TABLE I. Electrical performance characteristics. Conditions Test Symbol -55°C ≤ TA ≤ +125°C Group A Device Limits 1/ Unit unless otherwise specified subgroups type Min Max Input offset voltage VIO VS = ±5 V, ±15 V 1 01 -3 +3 mV 2,3 -5 +5 Input bias current -IIB VS = ±5 V, ±15 V 1 01 -5 +5 µA 2,3 -30 +30 +IIB 1 -10 +10 2,3 -25 +25 Input bias current -IIBS VS = ±4.5 V to ±18 V 1,2,3 01 -2 +2 µA/V versus supply voltage +IIBS Input bias current -IIBCM VS = ±15 V, VCM = ±10 V 1,2,3 01 -3 +3 µA/V versus common mode voltage +IIBCM Open loop 2/ T 1,2,3 01 0.5 MΩ Z VS = ±15 V, VOUT = ±10 V, transresistance RL = 200 Ω VS = ±5 V, VOUT = ±2.5 V, 1 0.25 R 2,3 0.125 L = 150 Ω Output voltage swing VOUT VS = ±5 V, RL = 150 Ω 1 01 -2.5 +2.5 V 2,3 -2 +2 VS = ±15 V, RL = 500 Ω 1 -12.5 +12.5 2,3 -12 +12 Power supply IQ VS = ±15 V, VOUT = 0 V 1 01 18 mA quiescent current 2,3 22 VS = ±5 V, VOUT = 0 V 1 16 2,3 20 Power supply rejection PSRR VS = ±4.5 V to ±18 V 1,2,3 01 60 dB ratio See footnotes at end of table. STANDARD SIZE 5962-93131MICROCIRCUIT DRAWINGA DLA LAND AND MARITIME REVISION LEVEL SHEET COLUMBUS, OHIO 43218-3990 C 5 DSCC FORM 2234 APR 97 Document Outline DEPARTMENT OF DEFENSE SPECIFICATION DEPARTMENT OF DEFENSE STANDARDS