Datasheet AD8143 (Analog Devices) - 8
制造商 | Analog Devices |
描述 | High Speed, Triple Differential Receiver with Comparators |
页数 / 页 | 25 / 8 — Data Sheet. AD8143. Table 3. Parameter. Test Conditions/Comments. Min. … |
修订版 | A |
文件格式/大小 | PDF / 689 Kb |
文件语言 | 英语 |
Data Sheet. AD8143. Table 3. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit
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Data Sheet AD8143
VS = 5 V, TA = 25°C, REF = +2.5 V, RL = 150 Ω, CL = 2 pF, G = 1, TMIN to TMAX = −40°C to +85°C, unless otherwise noted.
Table 3. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth VOUT = 0.2 V p-p 220 MHz VOUT = 2 V p-p 125 MHz Bandwidth for 0.1dB Flatness VOUT = 0.2 V p-p 45 MHz Slew Rate VOUT = 2 V p-p, RL = 1 kΩ 1000 V/µs Settling Time VOUT = 2 V p-p, 1% 10 ns VOUT = 2 V p-p, 0.1% 23 ns Output Overdrive Recovery 50 ns NOISE Crosstalk VOUT = 1 V p-p, 10 MHz −70 dB Input Voltage Noise (RTI) f ≥ 10 kHz 14 nV/√Hz INPUT CHARACTERISTICS Common-Mode Rejection DC, VCM = −3.5 V to +3.5 V 76 90 dB VCM = 1 V p-p, f = 10 MHz 65 dB VCM = 1 V p-p, f = 100 MHz 32 dB Common-Mode Voltage Range V+IN − V−IN = 0 V 1.3 to 3.7 V Differential Operating Range ±2.5 V Resistance Differential 5 MΩ Common-mode 3 MΩ Capacitance Differential 2 pF Common-mode 3 pF DC PERFORMANCE Open-Loop Gain VOUT = ±1 V 70 dB Closed-Loop Gain Error DC, measured at G = 11 0.25 % Input Offset Voltage −3.4 +3.4 mV TMIN to TMAX 15 µV/°C Input Bias Current (+IN, −IN) −3 +2.7 µA Input Bias Current (REF, FB) −4.5 +3 µA Input Bias Current Drift TMIN to TMAX (+IN, −IN, REF, FB) 16 nA/°C Input Offset Current (+IN, −IN, REF, FB) −2.3 +1.3 µA Input Offset Current Drift TMIN to TMAX ±3 nA/°C OUTPUT PERFORMANCE Voltage Swing RLOAD = 150 Ω 0.88 3.58 V Output Current 40 mA Short Circuit Current Short to GND 150 mA COMPARATOR PERFORMANCE VOH RL = 10 kΩ 3.02 V VOL RL = 10 kΩ 0.25 V Hysteresis Width 32 mV Input Bias Current Input driven low 3.5 µA Propagation Delay, tPLH 20 ns Propagation Delay, tPHL 15 ns Output Rise Time 10% to 90% 15 ns Output Fall Time 10% to 90% 11 ns POWER-DOWN PERFORMANCE Power-Down VIH VS+ − 1.5 V Power-Down VIL VS+ − 2.5 V Power-Down IIH PD = VCC 1 µA Power-Down IIL PD = GND 230 µA Power-Down Assert Time 0.5 µs Rev. A | Page 7 of 24 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION OVERVIEW BASIC CLOSED-LOOP GAIN CONFIGURATIONS TERMINATING THE INPUT INPUT CLAMPING PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS Minimizing Parasitic Reactances in the Feedback Network Maximizing Heat Removal DRIVING A CAPACITIVE LOAD POWER-DOWN COMPARATORS SYNC PULSE EXTRACTION USING COMPARATORS OUTLINE DIMENSIONS ORDERING GUIDE