Minimizing Switching Regulator Residue in Linear Regulator Outputs (Linear Technology) - 6
| 作家 | Jim Williams |
| 制造商 | Linear Technology |
| 描述 | Application Note 101. Linear regulators are commonly employed to post-regulate switching regulator outputs. Benefits include improved stability, accuracy, transient response and lowered output impedance. Ideally, these performance gains would be accompanied by markedly reduced switching regulator generated ripple and spikes. In practice, all linear regulators encounter some difficulty with ripple and spikes, particularly as frequency rises. This publication explains the causes of linear regulators' dynamic limitations and presents board level techniques for improving ripple and spike rejection. A hardware based ripple/spike simulator is presented, enabling rapid breadboard testing under various conditions. Three appendices review ferrite beads, inductor based filters and probing practice for wideband, sub-millivolt signals. |
| 页数 / 页 | 12 / 6 — Linear Regulator High Frequency Rejection Evalua-. tion/Optimization |
| 文件格式/大小 | PDF / 358 Kb |
| 文件语言 | 英语 |
Linear Regulator High Frequency Rejection Evalua-. tion/Optimization
文件文字版本
Application Note 101
Linear Regulator High Frequency Rejection Evalua-
Figure 9’s time and amplitude expansion of Figure 8’s
tion/Optimization
trace B permits high resolution study of spike character- istics, allowing the following evaluation and optimization. The circuit described above facilitates evaluation and Figure 10 shows dramatic results when a ferrite bead optimization of linear regulator high frequency rejection. immediately precedes C 2. Spike amplitude drops about The following photographs show results for one typical IN 5 set of conditions, but DC bias, ripple and spike charac- ×. The bead presents loss at high frequency, severely limiting spike passage3. DC and low frequency pass unat- teristics may be varied to suit desired test parameters. tenuated to the regulator. Placing a second ferrite bead Figure 7 shows Figure 5’s LT1763 3V regulator response at the regulator output before C to a 3.3V DC input with trace A’s ripple/spike contents, OUT produces Figure 11’s trace. The bead’s high frequency loss characteristic further CIN = 1μF and COUT = 10μF. Regulator output (trace B) reduces spike amplitude below 1mV without introducing shows ripple attenuated by a factor of ≈ 20. Output spikes DC resistance into the regulator’s output path4. see somewhat less reduction and their harmonic content remains high. The regulator offers no rejection at the spike Figure 12, a higher gain version of the previous fi gure, rise time. The capacitors must do the job. Unfortunately, measures 900µV spike amplitude – almost 20× lower than the capacitors are limited by inherent high frequency loss without the ferrite beads. The measurement is completed terms from completely fi ltering the wideband spikes; trace by verifying that indicated results are not corrupted by B’s remaining spike shows no risetime reduction. Increas- common mode components or ground loops. This is done ing capacitor value has no benefi t at these rise times. by grounding the oscilloscope input near the measurement Figure 8 (same trace assignments as Figure 7) taken with point. Ideally, no signal should appear. Figure 13 shows COUT = 33μF, shows 5× ripple reduction but little spike this to be nearly so, indicating that Figure 12’s display is amplitude attenuation. realistic5. A = 0.2V/DIV AC COUPLED ON 3.3VDC 0.005V/DIV AC COUPLED ON 3VDC B = 0.01V/DIV AC COUPLED ON 3VDC 500ns/DIV 200ns/DIV
Figure 8. Same Trace Assignments as Figure 7 with COUT Figure 9. Time and Amplitude Expansion of Figure 8’s Output Increased to 33
μ
F. Output Ripple Decreases By 5
×
, But Spikes Trace Permits Higher Resolution Study of Spike Characteristics. Remain. Spike Risetime Appears Unchanged Trace Center-Screen Area Intensifi ed for Photographic Clarity in This and Succeeding Figures Note 2:
“Dramatic” is perhaps a theatrical descriptive, but certain types fi nd drama in these things.
Note 3:
See Appendix A for information on ferrite beads
Note 4:
Inductors can sometimes be used in place of beads but their limitations should be understood. See Appendix B.
Note 5:
Faithful wideband measurement at sub-millivolt levels requires special considerations. See Appendix C. an101f AN101-6
Linear Regulator High Frequency Rejection Evalua-
Figure 9’s time and amplitude expansion of Figure 8’s
tion/Optimization
trace B permits high resolution study of spike character- istics, allowing the following evaluation and optimization. The circuit described above facilitates evaluation and Figure 10 shows dramatic results when a ferrite bead optimization of linear regulator high frequency rejection. immediately precedes C 2. Spike amplitude drops about The following photographs show results for one typical IN 5 set of conditions, but DC bias, ripple and spike charac- ×. The bead presents loss at high frequency, severely limiting spike passage3. DC and low frequency pass unat- teristics may be varied to suit desired test parameters. tenuated to the regulator. Placing a second ferrite bead Figure 7 shows Figure 5’s LT1763 3V regulator response at the regulator output before C to a 3.3V DC input with trace A’s ripple/spike contents, OUT produces Figure 11’s trace. The bead’s high frequency loss characteristic further CIN = 1μF and COUT = 10μF. Regulator output (trace B) reduces spike amplitude below 1mV without introducing shows ripple attenuated by a factor of ≈ 20. Output spikes DC resistance into the regulator’s output path4. see somewhat less reduction and their harmonic content remains high. The regulator offers no rejection at the spike Figure 12, a higher gain version of the previous fi gure, rise time. The capacitors must do the job. Unfortunately, measures 900µV spike amplitude – almost 20× lower than the capacitors are limited by inherent high frequency loss without the ferrite beads. The measurement is completed terms from completely fi ltering the wideband spikes; trace by verifying that indicated results are not corrupted by B’s remaining spike shows no risetime reduction. Increas- common mode components or ground loops. This is done ing capacitor value has no benefi t at these rise times. by grounding the oscilloscope input near the measurement Figure 8 (same trace assignments as Figure 7) taken with point. Ideally, no signal should appear. Figure 13 shows COUT = 33μF, shows 5× ripple reduction but little spike this to be nearly so, indicating that Figure 12’s display is amplitude attenuation. realistic5. A = 0.2V/DIV AC COUPLED ON 3.3VDC 0.005V/DIV AC COUPLED ON 3VDC B = 0.01V/DIV AC COUPLED ON 3VDC 500ns/DIV 200ns/DIV
Figure 8. Same Trace Assignments as Figure 7 with COUT Figure 9. Time and Amplitude Expansion of Figure 8’s Output Increased to 33
μ
F. Output Ripple Decreases By 5
×
, But Spikes Trace Permits Higher Resolution Study of Spike Characteristics. Remain. Spike Risetime Appears Unchanged Trace Center-Screen Area Intensifi ed for Photographic Clarity in This and Succeeding Figures Note 2:
“Dramatic” is perhaps a theatrical descriptive, but certain types fi nd drama in these things.
Note 3:
See Appendix A for information on ferrite beads
Note 4:
Inductors can sometimes be used in place of beads but their limitations should be understood. See Appendix B.
Note 5:
Faithful wideband measurement at sub-millivolt levels requires special considerations. See Appendix C. an101f AN101-6