Datasheet LTC2320-14 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | Octal, 14-Bit + Sign, 1.5Msps/Ch Simultaneous Sampling ADC |
| 页数 / 页 | 34 / 6 — POWER REQUIREMENTS. The. denotes the specifications which apply over the … |
| 文件格式/大小 | PDF / 2.2 Mb |
| 文件语言 | 英语 |
POWER REQUIREMENTS. The. denotes the specifications which apply over the full operating temperature
该数据表的模型线
文件文字版本
LTC2320-14
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Supply Voltage 5V Operation l 4.75 5.25 V 3.3V Operation l 3.13 3.47 V IVDD Supply Current 1.5Msps Sample Rate (IN+ = IN– = 0V) l 31 38 mA
CMOS I/O Mode
CMOS/LVDS = GND OVDD Supply Voltage l 1.71 2.63 V IOVDD Supply Current 1.5Msps Sample Rate (CL = 5pF) l 4.4 7.0 mA INAP Nap Mode Current Conversion Done (IVDD) l 5.3 6.2 mA ISLEEP Sleep Mode Current Sleep Mode (IVDD + IOVDD) l 20 110 µA PD_3.3V Power Dissipation VDD = 3.3V, 1.5Msps Sample Rate l 102 130 mW Nap Mode l 18 20.6 mW Sleep Mode l 20 355 µW PD_5V Power Dissipation VDD = 5V, 1.5Msps Sample Rate l 162 208 mW Nap Mode l 27 31.2 mW Sleep Mode l 30 525 µW
LVDS I/O Mode
CMOS/LVDS = OVDD, OVDD = 2.5V OVDD Supply Voltage l 2.37 2.63 V IOVDD Supply Current 1.5Msps Sample Rate (CL = 5pF, RL = 100Ω) l 26 34 mA INAP Nap Mode Current Conversion Done (IVDD) l 5.3 6.2 mA ISLEEP Sleep Mode Current Sleep Mode (IVDD + IOVDD) l 20 110 µA PD_3.3V Power Dissipation VDD = 3.3V, 1.5Msps Sample Rate l 151 195 mW Nap Mode l 52 58 mW Sleep Mode l 80 355 µW PD_5V Power Dissipation VDD = 5V, 1.5Msps Sample Rate l 214 280 mW Nap Mode l 60 68.5 mW Sleep Mode l 30 525 µW
ADC TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency l 1.5 Msps tCYC Time Between Conversions (Note 11) tCYC = tCNVH + tCONV + tREADOUT l 0.667 1000 µs tCONV Conversion Time l 450 ns tCNVH CNV High Time l 30 ns tACQUISITION Sampling Aperture (Note 11) tACQUISITION = tCYC – tCONV 215 ns tWAKE REFOUT1,2,3,4 Wake-Up Time CREFOUT1,2,3,4 = 10µF 50 ms
CMOS I/O Mode, SDR
CMOS/LVDS = GND, SDR/ DDR = GND tSCK SCK Period (Note 13) l 9.1 ns tSCKH SCK High Time l 4.1 ns tSCKL SCK Low Time l 4.1 ns tHSDO_SDR SDO Data Remains Valid Delay from CLKOUT↓ CL = 5pF (Note 12) l 0 1.5 ns tDSCKCLKOUT SCK to CLKOUT Delay (Note 12) l 2 4.5 ns 232014fa 6 For more information www.linear.com/LTC2320-14 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Supply Voltage 5V Operation l 4.75 5.25 V 3.3V Operation l 3.13 3.47 V IVDD Supply Current 1.5Msps Sample Rate (IN+ = IN– = 0V) l 31 38 mA
CMOS I/O Mode
CMOS/LVDS = GND OVDD Supply Voltage l 1.71 2.63 V IOVDD Supply Current 1.5Msps Sample Rate (CL = 5pF) l 4.4 7.0 mA INAP Nap Mode Current Conversion Done (IVDD) l 5.3 6.2 mA ISLEEP Sleep Mode Current Sleep Mode (IVDD + IOVDD) l 20 110 µA PD_3.3V Power Dissipation VDD = 3.3V, 1.5Msps Sample Rate l 102 130 mW Nap Mode l 18 20.6 mW Sleep Mode l 20 355 µW PD_5V Power Dissipation VDD = 5V, 1.5Msps Sample Rate l 162 208 mW Nap Mode l 27 31.2 mW Sleep Mode l 30 525 µW
LVDS I/O Mode
CMOS/LVDS = OVDD, OVDD = 2.5V OVDD Supply Voltage l 2.37 2.63 V IOVDD Supply Current 1.5Msps Sample Rate (CL = 5pF, RL = 100Ω) l 26 34 mA INAP Nap Mode Current Conversion Done (IVDD) l 5.3 6.2 mA ISLEEP Sleep Mode Current Sleep Mode (IVDD + IOVDD) l 20 110 µA PD_3.3V Power Dissipation VDD = 3.3V, 1.5Msps Sample Rate l 151 195 mW Nap Mode l 52 58 mW Sleep Mode l 80 355 µW PD_5V Power Dissipation VDD = 5V, 1.5Msps Sample Rate l 214 280 mW Nap Mode l 60 68.5 mW Sleep Mode l 30 525 µW
ADC TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency l 1.5 Msps tCYC Time Between Conversions (Note 11) tCYC = tCNVH + tCONV + tREADOUT l 0.667 1000 µs tCONV Conversion Time l 450 ns tCNVH CNV High Time l 30 ns tACQUISITION Sampling Aperture (Note 11) tACQUISITION = tCYC – tCONV 215 ns tWAKE REFOUT1,2,3,4 Wake-Up Time CREFOUT1,2,3,4 = 10µF 50 ms
CMOS I/O Mode, SDR
CMOS/LVDS = GND, SDR/ DDR = GND tSCK SCK Period (Note 13) l 9.1 ns tSCKH SCK High Time l 4.1 ns tSCKL SCK Low Time l 4.1 ns tHSDO_SDR SDO Data Remains Valid Delay from CLKOUT↓ CL = 5pF (Note 12) l 0 1.5 ns tDSCKCLKOUT SCK to CLKOUT Delay (Note 12) l 2 4.5 ns 232014fa 6 For more information www.linear.com/LTC2320-14 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts