Datasheet LTC2500-32 (Analog Devices)

LTC2500-32 32-Bit Oversampling ADC with Configurable Digital Filter
FEATURES DESCRIPTION
n
±0.5ppm INL (Typ)
The LTC®2500-32 is a low noise, low power, high perfor- n
104dB SNR (Typ) at 1Msps
mance 32-bit ADC with an integrated configurable digital n
148dB Dynamic Range (Typ) at 61sps
filter. Operating from a single 2.5V supply, the LTC2500-32 n
Guaranteed 32-Bit No Missing Codes
features a fully differential input range up to ±VREF, with n
Configurable Digital Filter with Synchronization
VREF ranging from 2.5V to 5.1V. The LTC2500-32 supports n
Relaxed Anti-Aliasing Filter Requirements
a wide common mode range from 0V to VREF simplifying n
Dual Output 32-Bit SAR ADC
analog signal conditioning requirements. n
32-Bit Digitally Filtered Low Noise Output
The LTC2500-32 simultaneously provides two output n
24-Bit Differential + 7-Bit Common Mode 1Msps
codes: (1) a 32-bit digitally filtered high precision low
Output with Overrange Detection
noise code, and (2) a 32-bit no latency composite code. n
Wide Input Common Mode Range
The configurable digital filter reduces measurement noise n Guaranteed Operation to 85°C by lowpass filtering and downsampling the stream of data n 1.8V to 5V SPI-Compatible Serial I/O from the SAR ADC core, giving the 32-bit filtered output n Low Power: 24mW at 1Msps code. The 32-bit composite code consists of an overrange n 24-Lead 7mm × 4mm DFN Packages detection bit, a 24-bit code representing the differential input voltage and a 7-bit code representing the common
APPLICATIONS
mode input voltage. The 32-bit composite code is available each conversion cycle, with no cycle of latency. n Seismology n The digital filter is highly configurable through the SPI- Energy Exploration n compatible interface and features many distinct filter types Automatic Test Equipment n that suit a variety of applications. The digital lowpass filter High Accuracy Instrumentation relaxes the requirements for analog anti-aliasing. Multiple LTC2500-32 devices can be easily synchronized using the SYNC pin. All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. patents, including 7705765, 7961132, 8319673, 8576104, 8810443, 9231611, 9054727, 9331709 and patents pending.
TYPICAL APPLICATION Integral Nonlinearity vs Output Code
2.5V 1.8V TO 5.1V 2.0 10µF 0.1µF 1.5 IN+, IN– SAMPLE 1.0 ARBITRARY DIFFERENTIAL VDD LTC2500-32 OVDD MCLK V CLOCK REF VREF BUSY 0.5 IN+ DRL PROGRAMMABLE 32-BIT SDI 32-BIT LOW PASS 0 0V 0V SDOA WIDEBAND DIGITAL BIPOLAR UNIPOLAR SAR ADC SCKA V V FILTER –0.5 REF REF CORE RDLA INL ERROR (ppm) IN– 24-BIT RDLB –1.0 SDOB 0V 0V REF GND SCKB –1.5 DIFFERENTIAL INPUTS IN+/IN– WITH 250032 TA01 WIDE INPUT COMMON MODE RANGE 2.5V TO 5.1V –2.0 47µF –5 –2.5 0 2.5 5 (X7R, 1210 SIZE) INPUT VOLTAGE (V) 250032 TA01b 250032fb For more information www.linear.com/LTC2500-32 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics for Filtered Output (SDOA) Dynamic Accuracy for Filtered Output (SDOA) Converter Characteristics for No latency Output (SDOB) Dynamic Accuracy for No Latency Output (SDOB) Reference Input Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Overview Converter Operation Transfer Function Analog Input Input Drive Circuits ADC Reference Dynamic Performance Power Considerations Timing and Control Decimation Filters Digital Filter Types Digital Interface Preset Filter Modes Filtered Output Data No Latency Output Data Board Layout Package Description Revision History Typical Application Related Parts