Datasheet LT8315 (Analog Devices) - 10

LT8315
OPERATION
As the load gets very light, the LT8315 reduces switching
CV/CC Regulation
frequency while maintaining the minimum current limit in Like a traditional voltage regulator, the LT8315 imple- order to reduce current delivery while still properly sam- ments a G pling the output voltage. Because flyback pulses must be M transconductance amplifier that regulates the output voltage. In addition, the LT8315 includes a generated to regulate the output, a minimum switching current regulation loop which regulates the estimated frequency of 3.5kHz is enforced. The minimum switch- output current to a point set by the voltage on the IREG/ ing frequency determines how often the output voltage SS pin. Below the current setpoint, the output voltage is sampled and introduces a minimum load requirement. is regulated for constant-voltage (CV) regulation. Below Tying the SMODE pin to INTVCC enables Standby Mode, the voltage setpoint, the output current is regulated for which reduces the minimum switching frequency to 220Hz, constant-current (CC) regulation. reducing the minimum load requirement at the expense of a longer period between samples.
APPLICATIONS INFORMATION
The LT8315 is designed to be an easy-to-use, yet fully- The depletion FET is current-limited to avoid destructive featured flyback regulator. With proper technique, it is power levels. To ensure start-up, do not load INTVCC or simple to build an efficient and robust power solution. BIAS with excessive current while the chip is starting. However, don’t let the simplicity beguile you into sloppy
ENABLE and Undervoltage Lockout (UVLO)
lab practices: the voltage and power levels involved can be lethal.
Milliamperes from a high voltage power sup-
A resistive divider from VIN to the EN/UVLO pin implements
ply can cause heart fibrillation and death.
Never touch undervoltage lockout (UVLO). The EN/UVLO pin threshold conductive nodes while the circuit is active, and keep one is set at 1.22V. Upon startup, the EN/UVLO pin exhibits a hand behind your back while probing. Conduct lab work ~65mV hysteresis voltage to prevent oscillations. in the presence of an assistant, who can perform first aid The EN/UVLO pin can also be driven with logic levels and in case of emergency. set by the output pin of a digital controller. Otherwise, EN/UVLO can also be tied to BIAS or INTV
Depletion Startup FET
CC to keep the chip enabled. The LT8315 features an internal depletion-mode FET, which has a negative threshold voltage and is therefore normally
Output Voltage
on. At startup, this FET charges the INTVCC capacitor to The output voltage is programmed by the R 12V so that the LT8315 has power to begin switching. FB1 and RFB2 resistors depicted in the Block Diagram. The LT8315 This removes the need for an external bleeder resistor or operates similarly to traditional current-mode switchers, other startup components. Once INTVCC is charged, the except in the use of a unique sample-and-hold error ampli- depletion-mode FET turns off. fier, which regulates the isolated output voltage from the sampled flyback pulse. 8315fa 10 For more information www.linear.com/LT8315 Document Outline FEATURES APPLICATIONS DESCRIPTION TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS