Datasheet LT8471 (Analog Devices) - 9

制造商Analog Devices
描述Dual Multitopology DC/DC Converters with 2A Switches and Synchronization
页数 / 页36 / 9 — operaTion. Skyhook Channel. Primary Channels. Start-Up Operation
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operaTion. Skyhook Channel. Primary Channels. Start-Up Operation

operaTion Skyhook Channel Primary Channels Start-Up Operation

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LT8471
operaTion
The LT8471 consists of two primary channels, each with PG1 and PG2 pin states are only valid when the respective a 2A power switch. One Skyhook channel is also avail- channel is enabled and VIN1 is above 2.6V. able with a 500mA power switch to support the primary channels when performing step-down conversions. The
Skyhook Channel
maximum voltage between VIN1 and E1 (or VIN2 and E2) is When either channel is configured as a buck, ZETA or 40V when E1 (or E2) is grounded. This is the case for boost, single-inductor inverting converter, the respective V SEPIC, flyback and dual-inductor inverting topologies. The IN pin(s) must be boosted above the input voltage, V maximum allowed voltage between V CC. The IN1 and E1 (or VIN2 boosted supply provides base current to the appropriate and E2) is 60V when E1 (or E2) is allowed to toggle, such Q1 and/or Q2 NPN power switch. The Skyhook channel as in buck, ZETA and single-inductor inverting topologies. provides this boosted voltage to the SHOUT pin which must also be connected to V
Primary Channels
IN2 and/or VIN1 as needed. The Skyhook is a constant-frequency, voltage mode The two primary channels, 1 and 2, can be independently boost converter including a Schottky diode integrated on configured as boost, buck, SEPIC, ZETA, flyback or invert- chip. The Skyhook output, SHOUT, is regulated to a fixed ing DC/DC converters to adapt into various applications. voltage (4.25V typical) above the C2 pin which must be Both channels use a constant-frequency, current mode connected to a DC voltage (typically V control scheme to provide line and load regulation (refer CC). If the Skyhook is not needed it can be disabled by tying the C3 pin to GND. to the Block Diagram). The channel 1 clock is in phase This also reduces the current draw from V with the internal oscillator or the SYNC pin if it is toggling. IN1. Refer to the Applications Information section for more information In order to reduce transient switching spikes, the clock about the proper use of the Skyhook channel. for channel 2 is approximately 180° out-of-phase with the channel 1 clock. The Skyhook operates as follows: An error amplifier mea- sures the output voltage (SHOUT) through the SHOUT-C2 At the start of each clock phase, an SR latch (SR11/SR12 voltage comparator and servos an internal control volt- in the Block Diagram) is set, turning on the internal power age. The control voltage determines the on-time of the switch (Q1/Q2 in the Block Diagram) for the respective Q3 power switch for each cycle, and thus, the amount of channel. An amplifier (A41/A42 in the Block Diagram) and current being delivered to SHOUT. Loop compensation a comparator (A31/A32 in the Block Diagram) monitor the is integrated in the chip. Comparator A43 monitors the current flowing through the internal power switch, turning current in the power switch Q3 in order to detect over the switch off when the current reaches a level determined current conditions. If current in excess of 500mA (typ) is by the voltage at VC1/VC2. An error amplifier measures detected, switch Q3 is immediately turned off. the output voltage through an external resistor divider tied to the FB1/FB2 pin and servos the VC1/VC2 voltage. If
Start-Up Operation
the error amplifier’s output (VC1/VC2) increases, more current is delivered to the output; if it decreases, less Several functions are provided to enable a clean start-up current is delivered. An internal clamp on the VC1/VC2 for the LT8471. voltage provides current limit. • First, the OV/UV pin voltage is monitored by an inter- Both of the primary channels contain a power good com- nal voltage reference to give a precise turn-on voltage parator which trips when the corresponding FB pin voltage range. An external resistor (or resistor divider) can be is at 92.5% of its regulated value. The PG1 and PG2 outputs connected from the input power supply to the OV/UV are driven by open-drain N-channel MOSFET devices that pin to provide a user-programmable undervoltage and are off when the respective output is in regulation, allow- overvoltage lockout function. ing external resistors to pull the PG1/PG2 pins high. The • Second, the soft-start circuitry provides for a gradual ramp-up of the switch current for the primary channels 8471fd For more information www.linear.com/8471 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Related Parts