LT3748 block DiagraM T1 DOUT V N IN PS:1 V + OUT CIN LPRI LSEC COUT RFB V – OUT 1 16 VIN R TC FB CURRENT – BOUNDARY Q1 Q2 1.223V MODE DETECT +A4 TC INTVCC 12 –A1 5 RTC + CBIAS 20µA 6.04k ERROR AMP 50µs MAX OFF TIMER 1.223V + R g REF 14 – m MASTER RREF LATCH VARIABLE S S GATE Q DELAY TIMER A4 6 NMOS R R R1 1.223V + INTERNAL 50µs MAX GND EN/UVLO REFERENCE ON TIMER 3 –A3 5µA 8, 9 AND R2 REGULATORS A2 – – + 2.4µA SENSE 100mV 7 CURRENT RSENSE LIMIT SS VC 10 11 CSS RC 3748 BD CC 3748fb For more information www.linear.com/LT3748 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration order information Electrical Characteristics Typical Performance Characteristics Pin Functions block diagram Operation Applications Information Package Description Typical Application Related Parts