Datasheet LTC1871-1 (Analog Devices) - 9

制造商Analog Devices
描述Wide Input Range, No RSENSE  Current Mode Boost, Flyback and SEPIC Controller
页数 / 页36 / 9 — OPERATION. Programming the Operating Mode. Pulse-Skip Mode Operation. …
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OPERATION. Programming the Operating Mode. Pulse-Skip Mode Operation. Burst Mode Operation

OPERATION Programming the Operating Mode Pulse-Skip Mode Operation Burst Mode Operation

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LTC1871-1
OPERATION Programming the Operating Mode
MOSFET RDS(ON). If the ITH pin drops below 0.175V, the Burst Mode comparator B1 will turn off the power MOSFET For applications where maximizing the effi ciency at very and scale back the quiescent current of the IC to 250μA light loads (e.g., <100μA) is a high priority, the current (sleep mode). In this condition, the load current will be in the output divider could be decreased to a few micro- supplied by the output capacitor until the ITH voltage rises amps and Burst Mode operation should be applied (i.e., above the 50mV hysteresis of the burst comparator. At the MODE/SYNC pin should be connected to ground). light loads, short bursts of switching (where the average In applications where fi xed frequency operation is more inductor current is 20% of its maximum value) followed critical than low current effi ciency, or where the lowest by long periods of sleep will be observed, thereby greatly output ripple is desired, pulse-skip mode operation should improving converter effi ciency. Oscilloscope waveforms be used and the MODE/SYNC pin should be connected illustrating Burst Mode operation are shown in Figure 3. to the INTVCC pin. This allows discontinuous conduction mode (DCM) operation down to near the limit defi ned
Pulse-Skip Mode Operation
by the chip’s minimum on-time (about 175ns). Below this output current level, the converter will begin to skip With the MODE/SYNC pin tied to a DC voltage above 2V, cycles in order to maintain output regulation. Figures 3 Burst Mode operation is disabled. The internal, 0.525V and 4 show the light load switching waveforms for Burst buffered ITH burst clamp is removed, allowing the ITH Mode and pulse-skip mode operation for the converter pin to directly control the current comparator from no in Figure 1. load to full load. With no load, the ITH pin is driven below 0.175V, the power MOSFET is turned off and sleep mode
Burst Mode Operation
is invoked. Oscilloscope waveforms illustrating this mode of operation are shown in Figure 4. Burst Mode operation is selected by leaving the MODE/ SYNC pin unconnected or by connecting it to ground. In When an external clock signal drives the MODE/SYNC normal operation, the range on the ITH pin corresponding to pin at a rate faster than the chip’s internal oscillator, the no load to full load is 0.30V to 1.2V. In Burst Mode opera- oscillator will synchronize to it. In this synchronized mode, tion, if the error amplifi er EA drives the ITH voltage below Burst Mode operation is disabled. The constant frequency 0.525V, the buffered ITH input to the current comparator associated with synchronized operation provides a more C1 will be clamped at 0.525V (which corresponds to 25% controlled noise spectrum from the converter, at the ex- of maximum load current). The inductor current peak is pense of overall system effi ciency of light loads. then held at approximately 30mV divided by the power VIN = 3.3V MODE/SYNC = 0V VIN = 3.3V MODE/SYNC = INTVCC VOUT = 5V (Burst Mode OPERATION) VOUT = 5V (PULSE-SKIP MODE) IOUT = 500mA IOUT = 500mA VOUT VOUT 50mV/DIV 50mV/DIV IL IL 5A/DIV 5A/DIV 10μs/DIV 18711 F03 2μs/DIV 18711 F04
Figure 3. LTC1871-1 Burst Mode Operation Figure 4. LTC1871-1 Low Output Current Operation with (MODE/SYNC = 0V) at Low Output Current Burst Mode Operation Disabled (MODE/SYNC = INTVCC)
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