Datasheet ADM1041A (Analog Devices) - 10

link to page 39 link to page 39 link to page 39 link to page 39 link to page 39 link to page 39 link to page 39 link to page 39 link to page 41 link to page 42 link to page 41 link to page 41 link to page 44 link to page 44 link to page 44 link to page 44 link to page 44 link to page 44 link to page 43 link to page 41
ADM1041A Parameter Min Typ Max Unit Test Conditions/Comments
Reverse Voltage Detector Turn-Off Threshold VCS− = 2 V for threshold specs 100 mV Reg 03h[7:6] = 00. See Table 12. 150 mV Reg 03h[7:6] = 01. See Table 12. 200 mV Reg 03h[7:6] = 10. See Table 12. 250 mV Reg 03h[7:6] = 11. See Table 12. Reverse Voltage Detector Turn-On Threshold VCS− = 2 V for threshold specs 20 mV Reg 03h[5:4] = 00. See Table 12. 30 mV Reg 03h[5:4] = 01. See Table 12. 40 mV Reg 03h[5:4] = 10. See Table 12. 50 mV Reg 03h[5:4] = 11. See Table 12. FD Input Impedance 500 kΩ FS Input Impedance 20 kΩ ACSENSE1/ACSENSE2 COMPARATOR Reg 12h[2] = 0 Reg 0Dh[3:2] = 00. See Table 22 . AC or Bulk Sense Reg 12h[2] = 1 Reg 0Eh[7:6] = 00. See Table 23. Threshold Voltage 1.25 V Threshold Adjust Range 1.10 1.40 V Min: DAC = 0 Max: DAC = Full Scale Threshold Trim Step 0.8 % 1.10 ≤ VTRIM ≤ 1.4 V 10 mV 5 bits, 31 steps Reg 0Ch[7:3]. See Table 21. Hysteresis Adjust Range 200−550 mV VACSENSE > 1 V, RTHEVENIN = 909R Hysteresis Trim Step 50 mV 200 ≤ VTRIM ≤ 550 mV. 7 steps Reg 0Ch[2:0]. See Table 21. Noise Filter 0.6 1 1.2 ms PULSE-IN Threshold Voltage 0.525 V PULSE_OK On Delay 1 μs PULSE_OK Off Delay 0.8 1 1.2 s OSCILLATOR −5 +5 % Unless otherwise specified OCP OCP Threshold Voltage2 0.3 0.5 0.7 V Force CCMP for drop in VCMP Reg 11h[2] = 0. See Table 26. OCP Shutdown Delay Time (Continuous 1 s Reg 12h[4:3] = 00. See Table 27. Period in Current Limit) 2 s Reg 12h[4:3] = 01. See Table 27. 3 s Reg 12h[4:3] = 10. See Table 27. 4 s Reg 12h[4:3] = 11. See Table 27. OCP Fast Shutdown Delay Time 0 100 ms Reg 11h[2] = 1. See Table 26. VCCMP = 1.5 V MON1, MON2, MON3, MON4 Sense Voltage 1.21 1.25 1.29 V Hysteresis 0.1 V OVP Noise Filter 5 25 μs UVP Noise Filter 300 600 μs OTP (MON5) Reg 0Fh[4:2] = 01x or 10x. See Table 24. Sense Voltage Range 2.2 2.45 V OTP Trim Step 24 mV 2.1 ≤ VTRIM ≤ 2.45 V 4 bits, 15 steps, Reg 0Bh[7:4]. See Table 20. Hysteresis 100 130 160 μA VOTP = 2 V Rev. 0 | Page 10 of 56 Document Outline FEATURES SECONDARY-SIDE FEATURES INTERFACE AND INTERNAL FEATURES APPLICATIONS GENERAL DESCRIPTION SAMPLE APPLICATION CIRCUIT DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY THEORY OF OPERATION POWER MANAGEMENT GAIN TRIMMING AND CONFIGURATION DIFFERENTIAL REMOTE SENSE AMPLIFIER SET LOAD VOLTAGE LOAD OVERVOLTAGE (OV) LOCAL VOLTAGE SENSE LOCAL OVERVOLTAGE PROTECTION (OVP) LOCAL UNDERVOLTAGE PROTECTION (UVP) FALSE UV CLAMP VOLTAGE ERROR AMPLIFIER MAIN VOLTAGE REFERENCE CURRENT-SENSE AMPLIFIER CURRENT SENSING CURRENT-TRANSFORMER INPUT CURRENT-SENSE CALIBRATION CURRENT-LIMIT ERROR AMPLIFIER OVERCURRENT PROTECTION CURRENT SHARE CURRENT-SHARE OFFSET ISHARE DRIVE AMPLIFIER DIFFERENTIAL SENSE AMPLIFIER ISHARE ERROR AMPLIFIER ISHARE CLAMP SHARE_OK DETECTOR PULSE/ACSENSE2 PULSE ACSENSE OrFET GATE DRIVE OSCILLATOR AND TIMING GENERATORS LOGIC I/O AND MONITOR PINS CBD/ALERT MON1 MON2 PEN PSON MON3 DC_OK (POWER-OK, POWER Good, Etc.) MON4 AC_OK MON5 SMBus SERIAL PORT MICROPROCESSOR SUPPORT Interfacing Configuring for a Microprocessor BROADCASTING SMBus SERIAL INTERFACE GENERAL SMBus TIMING SMBus PROTOCOLS FOR RAM AND EEPROM SMBus Erase EEPROM Page Operations SMBus Write Operations Send Byte Write Byte/Word Block Write SMBus READ OPERATIONS Receive Byte Block Read Notes on SMBus Read Operations SMBus ALERT RESPONSE ADDRESS (ARA) SUPPORT FOR SMBus 1.1 LAYOUT CONSIDERATIONS POWER-UP AUTO-CONFIGURATION EXTENDED SMBus ADDRESSING SDA/PSONLINK SCL/AC_OKLink BACKDOOR ACCESS REGISTER LISTING DETAILED REGISTER DESCRIPTIONS MANUFACTURING DATA MICROPROCESSOR SUPPORT TEST NAME TABLE OUTLINE DIMENSIONS ORDERING GUIDE