Datasheet ATmega16M1, ATmega32M1, ATmega64M1 - Summary (Atmel) - 10
| 制造商 | Atmel |
| 描述 | 8-bit AVR Microcontroller |
| 页数 / 页 | 18 / 10 — Overview. 3.1. Block diagram Figure 3-1. Block diagram |
| 文件格式/大小 | PDF / 313 Kb |
| 文件语言 | 英语 |
Overview. 3.1. Block diagram Figure 3-1. Block diagram
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文件文字版本
3. Overview
The Atmel ATmega16M1/32M1/64M1 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega16M1/32M1/64M1 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
3.1. Block diagram Figure 3-1. Block diagram.
Data bus 8-bit Program Status Interrupt Flash program counter and control unit memory SPI unit 32 x 8 Instruction general Watchdog register purpose timer registrers Instruction Four analog comparators decoder g g in in s s s s ALU re HW LIN/UART re d Control lines d d d a a t t c c re ire Timer 0 d Di In Timer 1 Data SRAM ADC EEPROM DAC I/O lines MPSC Current source CAN The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The Atmel ATmega16M1/32M1/64M1 provides the following features: 16/32/64Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 512B/1K/2Kbytes EEPROM, 1/2/4Kbytes SRAM, 27 general purpose I/O lines, 32 general purpose working registers, one Motor Power Stage Controller, two flexible Timer/Counters with compare modes and PWM, one UART with HW LIN, an 11- channel 10-bit ADC with two differential input stages with programmable gain, a 10-bit DAC, a Atmel ATmega16M1/32M1/64M1 [DATASHEET] 10 Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Summary-10/2016 Document Outline Introduction Features Table of Contents 1. Pin configurations 1.1. Pin descriptions 2. Ordering Information 2.1. ATmega16M1 2.2. ATmega32M1 2.3. ATmega64M1 3. Overview 3.1. Block diagram 3.2. Pin descriptions 3.2.1. VCC 3.2.2. GND 3.2.3. Port B (PB7..PB0) 3.2.4. Port C (PC7..PC0) 3.2.5. Port D (PD7..PD0) 3.2.6. Port E (PE2..0) RESET/ XTAL1/XTAL2 3.2.7. AVCC 3.2.8. AREF 4. Resources 5. About code examples 6. Data retention 7. Packaging Information 7.1. 32-pin 32A 7.2. PV 32 QFN
The Atmel ATmega16M1/32M1/64M1 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega16M1/32M1/64M1 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
3.1. Block diagram Figure 3-1. Block diagram.
Data bus 8-bit Program Status Interrupt Flash program counter and control unit memory SPI unit 32 x 8 Instruction general Watchdog register purpose timer registrers Instruction Four analog comparators decoder g g in in s s s s ALU re HW LIN/UART re d Control lines d d d a a t t c c re ire Timer 0 d Di In Timer 1 Data SRAM ADC EEPROM DAC I/O lines MPSC Current source CAN The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The Atmel ATmega16M1/32M1/64M1 provides the following features: 16/32/64Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 512B/1K/2Kbytes EEPROM, 1/2/4Kbytes SRAM, 27 general purpose I/O lines, 32 general purpose working registers, one Motor Power Stage Controller, two flexible Timer/Counters with compare modes and PWM, one UART with HW LIN, an 11- channel 10-bit ADC with two differential input stages with programmable gain, a 10-bit DAC, a Atmel ATmega16M1/32M1/64M1 [DATASHEET] 10 Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Summary-10/2016 Document Outline Introduction Features Table of Contents 1. Pin configurations 1.1. Pin descriptions 2. Ordering Information 2.1. ATmega16M1 2.2. ATmega32M1 2.3. ATmega64M1 3. Overview 3.1. Block diagram 3.2. Pin descriptions 3.2.1. VCC 3.2.2. GND 3.2.3. Port B (PB7..PB0) 3.2.4. Port C (PC7..PC0) 3.2.5. Port D (PD7..PD0) 3.2.6. Port E (PE2..0) RESET/ XTAL1/XTAL2 3.2.7. AVCC 3.2.8. AREF 4. Resources 5. About code examples 6. Data retention 7. Packaging Information 7.1. 32-pin 32A 7.2. PV 32 QFN