Datasheet ATtiny22, ATtiny22L - Preliminary (Atmel) - 7

link to page 38 link to page 30 link to page 9 link to page 38
ATtiny22/22L X-Register, Y-Register, and Z-Register
The registers R26..R31 have some added functions to their general purpose usage. These registers are the address point- ers for indirect addressing of the Data Space. The three indirect address registers X, Y and Z are defined as:
Figure 6.
The X, Y, and Z Registers
15 0 X - register 7 0 7 0 R27 ($1B) R26 ($1A) 15 0 Y - register 7 0 7 0 R29 ($1D) R28 ($1C) 15 0 Z - register 7 0 7 0 R31 ($1F) R30 ($1E)
In the different addressing modes these address registers have functions as fixed displacement, automatic increment and decrement (see the descriptions for the different instructions).
ALU - Arithmetic Logic Unit
The high-performance AVR ALU operates in direct connection with all the 32 general purpose working registers. Within a single clock cycle, ALU operations between registers in the register file are executed. The ALU operations are divided into three main categories - arithmetic, logic and bit-functions
In-System Programmable Flash Program Memory
The ATtiny22/L contains 2K bytes on-chip In-System Programmable Flash memory for program storage. Since all instruc- tions are 16- or 32-bit words, the Flash is organized as 1K x 16. The Flash memory has an endurance of at least 1000 write/erase cycles. The ATtiny22/L Program Counter PC is 10 bits wide, hence addressing the 1024 program memory addresses. See page 38 for a detailed description on Flash data programming. Constant tables must be allocated within the address 0-2K (see the LPM - Load Program Memory instruction description). See page 9 for the different addressing modes.
EEPROM Data Memory
The ATtiny22/L contains 128 bytes of EEPROM data memory. It is organized as a separate data space, in which single bytes can be read and written. The EEPROM has an endurance of at least 100,000 write/erase cycles. The access between the EEPROM and the CPU is described on page 30 specifying the EEPROM address register, the EEPROM data register, and the EEPROM control register. For the SPI data downloading, see page 38 for a detailed description.
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Document Outline Features Description Block Diagram Pin Descriptions ATtiny22/L VCC GND Port B (PB4..PB0) RESET CLOCK Clock Options External Clock Architectural Overview General Purpose Register File X-Register, Y-Register, and Z-Register ALU - Arithmetic Logic Unit In-System Programmable Flash Program Memory EEPROM Data Memory SRAM Data Memory Program and Data Addressing Modes Register Direct, Single Register Rd Register Direct, Two Registers Rd and Rr I/O Direct Data Direct Data Indirect with Displacement Data Indirect Data Indirect With Pre-Decrement Data Indirect With Post-Increment Constant Addressing Using the LPM Instruction Indirect Program Addressing, IJMP and ICALL Relative Program Addressing, RJMP and RCALL Memory Access and Instruction Execution Timing I/O Memory Status Register - SREG Stack Pointer - SPL Reset and Interrupt Handling Reset Sources Power-On Reset External Reset Watchdog Reset MCU Status Register - MCUSR Interrupt Handling General Interrupt Mask Register - GIMSK General Interrupt Flag Register - GIFR Timer/Counter Interrupt Mask Register - TIMSK Timer/Counter Interrupt FLAG Register - TIFR External Interrupt Interrupt Response Time MCU Control Register - MCUCR Sleep Modes Idle Mode Power Down Mode Timer/Counter Timer/Counter Prescaler 8-Bit Timer/Counter0 Timer/Counter0 Control Register - TCCR0 Timer Counter 0 - TCNT0 Watchdog Timer Watchdog Timer Control Register - WDTCR EEPROM Read/Write Access EEPROM Address Register - EEAR EEPROM Data Register - EEDR EEPROM Control Register - EECR Prevent EEPROM Corruption I/O Port B Port B Data Register - PORTB Port B Data Direction Register - DDRB Port B Input Pins Address - PINB General Digital I/O Alternate Functions of Port B CLOCK - Port B, Bit 3 SCK/T0 - Port B, Bit 2 MISO - Port B, Bit 1 MOSI - Port B, Bit 0 Memory Programming Program and Data Memory Lock Bits Fuse Bits Signature Bytes Programming the Flash and EEPROM High-Voltage Serial Programming High-Voltage Serial Programming Algorithm High-Voltage Serial Programming Characteristics Low-Voltage Serial Downloading Low-Voltage Serial Programming Algorithm Data Polling EEPROM Data Polling Flash Low-Voltage Serial Programming Characteristics Electrical Characteristics Absolute Maximum Ratings* DC Characteristics External Clock Drive Waveforms External Clock Drive Typical characteristics Register Summary Instruction Set Summary (Continued) Ordering Information