Datasheet ADuM6200, ADuM6201, ADuM6202 (Analog Devices) - 3

制造商Analog Devices
描述Dual-Channel, 5 kV Isolators with Integrated DC-to-DC Converter
页数 / 页28 / 3 — Data Sheet. ADuM6200/ADuM6201/ADuM6202
修订版C
文件格式/大小PDF / 576 Kb
文件语言英语

Data Sheet. ADuM6200/ADuM6201/ADuM6202

Data Sheet ADuM6200/ADuM6201/ADuM6202

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Data Sheet ADuM6200/ADuM6201/ADuM6202 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY
Typical specifications are at TA = 25°C, VDD1 = VSEL = VISO = 5 V. Minimum/maximum specifications apply over the entire recommended operation range, which is 4.5 V ≤ VDD1, VSEL, VISO ≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 2. DC-to-DC Converter Static Specifications Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC-TO-DC CONVERTER SUPPLY Setpoint V 4.7 5.0 5.4 V I = 0 mA ISO ISO Line Regulation V 1 mV/V I = 40 mA, V = 4.5 V to 5.5 V ISO(LINE) ISO DD1 Load Regulation V 1 5 % I = 8 mA to 72 mA ISO(LOAD) ISO Output Ripple V 75 mV p-p 20 MHz bandwidth, C = 0.1 µF||10 µF, I = 72 mA ISO(RIP) BO ISO Output Noise V 200 mV p-p C = 0.1 µF||10 µF, I = 72 mA ISO(NOISE) BO ISO Switching Frequency f 180 MHz OSC PWM Frequency f 625 kHz PWM Output Supply Current I 80 mA V > 4.5 V ISO(MAX) ISO Efficiency at I 32 % I = 80 mA ISO(MAX) ISO I , No V Load I 10 26 mA DD1 ISO DD1(Q) I , Full V Load I 290 mA DD1 ISO DD1(MAX)
Table 3. DC-to-DC Converter Dynamic Specifications 1 Mbps—A or C Grade 25 Mbps—C Grade Test Conditions/ Parameter Symbol Min Typ Max Min Typ Max Unit Comments
SUPPLY CURRENT Input I DD1(D) ADuM6200 9 34 mA No V load ISO ADuM6201 10 38 mA No V load ISO ADuM6202 11 41 mA No V load ISO Available to Load I ISO(LOAD) ADuM6200 80 74 mA ADuM6201 80 72 mA ADuM6202 80 70 mA
Table 4. Switching Specifications A Grade C Grade Test Conditions/ Parameter Symbol Min Typ Max Min Typ Max Unit Comments
SWITCHING SPECIFICATIONS Data Rate 1 25 Mbps Within PWD limit Propagation Delay t , t 55 100 45 60 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 40 6 ns |t − t | PLH PHL Change vs. Temperature 5 ps/°C Pulse Width PW 1000 40 ns Within PWD limit Propagation Delay Skew t 50 15 ns Between any two units PSK Channel Matching Codirectional1 t 50 6 ns PSKCD Opposing Directional2 t 50 15 ns PSKOD 1 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation 7 barrier. 2 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. Rev. C | Page 3 of 28 Document Outline Features Applications General Description Functional Block Diagrams Table of Contents Revision History Specifications Electrical Characteristics—5 V Primary Input Supply/5 V Secondary Isolated Supply Electrical Characteristics—3.3 V Primary Input Supply/3.3 V Secondary Isolated Supply Electrical Characteristics—5 V Primary Input Supply/3.3 V Secondary Isolated Supply Package Characteristics Regulatory Information Insulation and Safety-Related Specifications Insulation Characteristics IEC 60747-5-2 (VDE 0884 Part 2):2003-01 and DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Thermal Derating Curve Recommended Operating Conditions Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Truth Table Typical Performance Characteristics Terminology Applications Information PCB Layout Start-Up Behavior EMI Considerations Propagation Delay Parameters DC Correctness and Magnetic Field Immunity Power Consumption Current-Limit and Thermal Overload Protection Power Considerations Thermal Analysis Increasing Available Power Insulation Lifetime Outline Dimensions Ordering Guide