Datasheet ADuM5200, ADuM5201, ADuM5202 (Analog Devices) - 3

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Data Sheet ADuM5200/ADuM5201/ADuM5202 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY
Al typical specifications are at TA = 25°C, VDD1 = VSEL = VISO = 5 V. Minimum/maximum specifications apply over the entire recommended operation range which is 4.5 V ≤ VDD1, VSEL, VISO ≤ 5.5 V; and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 2. DC-to-DC Converter Static Specifications Parameter Symbol Min Typ Max Unit Test Conditions
DC-TO-DC CONVERTER SUPPLY Setpoint V 4.7 5.0 5.4 V I = 0 mA ISO ISO Line Regulation V 1 mV/V I = 50 mA, V = 4.5 V to 5.5 V ISO (LINE) ISO DD1 Load Regulation V 1 5 % I = 10 mA to 90 mA ISO (LOAD) ISO Output Ripple V 75 mV p-p 20 MHz bandwidth, C = 0.1 µF||10 µF, I = 90 mA ISO (RIP) BO ISO Output Noise V 200 mV p-p C = 0.1 µF||10 µF, I = 90 mA ISO (NOISE) BO ISO Switching Frequency f 180 MHz OSC PW Modulation Frequency f 625 kHz PWM Output Supply I 100 mA V > 4.5 V ISO (MAX) ISO Efficiency at I 34 % I = 100 mA ISO (MAX) ISO I , No V Load I 8 22 mA DD1 ISO DD1 (Q) I , Full V Load I 290 mA DD1 ISO DD1 (MAX)
Table 3. DC-to-DC Converter Dynamic Specifications 1 Mbps—A Grade or C Grade 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions
SUPPLY CURRENT Input No V load ISO ADuM5200 I 6 34 mA DD1 ADuM5201 I 7 38 mA DD1 ADuM5202 I 7 41 mA DD1 Available to Load ADuM5200 I 100 94 mA ISO (LOAD) ADuM5201 I 100 92 mA ISO (LOAD) ADuM5202 I 100 90 mA ISO (LOAD)
Table 4. Switching Specifications A Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions
SWITCHING SPECIFICATIONS Data Rate 1 25 Mbps Within PWD limit Propagation Delay t , t 55 100 45 60 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 40 6 ns |t − t | PLH PHL Change vs. Temperature 5 ps/°C Pulse Width PW 1000 40 ns Within PWD limit Propagation Delay Skew t 50 15 ns Between any two units PSK Channel Matching Codirectional1 t 50 6 ns PSKCD Opposing Directional2 t 50 15 ns PSKOD 1 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation 7 barrier. 2 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. Rev. B | Page 3 of 28 Document Outline Features Applications General Description Functional Block Diagrams Table of Contents Revision History Specifications Electrical Characteristics—5 V Primary Input Supply/5 V Secondary Isolated Supply Electrical Characteristics—3.3 V Primary Input Supply/3.3 V Secondary Isolated Supply Electrical Characteristics—5 V Primary Input Supply/3.3 V Secondary Isolated Supply Package Characteristics Regulatory Information Insulation and Safety-Related Specifications IEC 60747-5-2 (VDE 0884, Part 2):2003-01 Insulation Characteristics Recommended Operating Conditions Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Truth Table Typical Performance Characteristics Terminology Applications Information PCB Layout Start-Up Behavior EMI Considerations Propagation Delay Parameters DC Correctness and Magnetic Field Immunity Power Consumption Current Limit and Thermal Overload Protection Power Considerations Thermal Analysis Increasing Available Power Insulation Lifetime Outline Dimensions Ordering Guide