Datasheet LT1236 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Precision Reference |
| 页数 / 页 | 12 / 7 — APPLICATIONS INFORMATION. Effect of Reference Drift on System Accuracy. … |
| 文件格式/大小 | PDF / 230 Kb |
| 文件语言 | 英语 |
APPLICATIONS INFORMATION. Effect of Reference Drift on System Accuracy. LT1236-5. Maximum Allowable Reference Drift
该数据表的模型线
- LT1236ACN8-10#PBF LT1236ACN8-5#PBF LT1236ACS8-10#PBF LT1236ACS8-10#TRPBF LT1236ACS8-5#PBF LT1236ACS8-5#TRPBF LT1236AIN8-10#PBF LT1236AIS8-10#PBF LT1236AIS8-10#TRPBF LT1236AIS8-5#PBF LT1236AIS8-5#TRPBF LT1236BCN8-10#PBF LT1236BCN8-5#PBF LT1236BCS8-10#PBF LT1236BCS8-10#TRPBF LT1236BCS8-5#PBF LT1236BCS8-5#TRPBF LT1236BIN8-10#PBF LT1236BIN8-5#PBF LT1236BIS8-10#PBF LT1236BIS8-10#TRPBF LT1236BIS8-5#PBF LT1236BIS8-5#TRPBF LT1236CCN8-10#PBF LT1236CCN8-5#PBF LT1236CCS8-10#PBF LT1236CCS8-10#TRPBF LT1236CCS8-5#PBF LT1236CCS8-5#TRPBF LT1236CIN8-10#PBF LT1236CIN8-5#PBF LT1236CIS8-10#PBF LT1236CIS8-10#TRPBF LT1236CIS8-5#PBF LT1236CIS8-5#TRPBF
文件文字版本
LT1236
U U W U APPLICATIONS INFORMATION Effect of Reference Drift on System Accuracy
in series with a 20kΩ potentiometer will give ±10mV trim range. Effect on the output TC will be only 1ppm/°C for the A large portion of the temperature drift error budget in ±5mV trim needed to set the “A” device to 10.000V. many systems is the system reference voltage. This graph indicates the maximum temperature coefficient allowable
LT1236-5
if the reference is to contribute no more than 0.5LSB error to the overall system performance. The example shown is The LT1236-5 does have an output voltage trim pin, but a 12-bit system designed to operate over a temperature the TC of the nominal 4V open circuit voltage at pin 5 is range from 25°C to 65°C. Assuming the system calibra- about –1.7mV/°C. For the voltage trimming not to affect tion is performed at 25°C, the temperature span is 40°C. reference output TC, the external trim voltage must track It can be seen from the graph that the temperature coeffi- the voltage on the trim pin. Input impedance of the trim pin cient of the reference must be no worse than 3ppm/°C if is about 100kΩ and attenuation to the output is 13:1. The it is to contribute less than 0.5LBS error. For this reason, technique shown below is suggested for trimming the the LT1236 family has been optimized for low drift. output of the LT1236-5 while maintaining minimum shift in output temperature coefficient. The R1/R2 ratio is
Maximum Allowable Reference Drift
chosen to minimize interaction of trimming and TC shifts, 100 so the exact values shown should be used. 8-BIT °C) LT1236-5 10-BIT IN OUT VOUT 10 GND TRIM R1 27k R2 12-BIT 50k 0.5LSB ERROR (ppm/ 1N4148 14-BIT MAXIMUM TEMPERATURE COEFFICIENT FOR 1.0 LT1236 AI02 10 20 30 40 50 60 70 80 90 100 TEMPERATURE SPAN (°C)
Capacitive Loading and Transient Response
LT1236 AI01 The LT1236 is stable with all capacitive loads, but for
Trimming Output Voltage
optimum settling with load transients, output capacitance The LT1236-10 has a trim pin for adjusting output voltage. should be under 1000pF. The output stage of the reference The impedance of the trim pin is about 12kΩ with a is class AB with a fairly low idling current. This makes nominal open circuit voltage of 5V. It is designed to be transient response worse-case at light load currents. driven from a source impedance of 3kΩ or less to mini- Because of internal current drain on the output, actual mize changes in the LT1236 TC with output trimming. worst-case occurs at ILOAD = 0 on LT1236-5 and ILOAD = Attenuation between the trim pin and the output is 70:1. 1.4mA (sinking) on LT1236-10. Significantly better load This allows ±70mV trim range when the trim pin is tied to transient response is obtained by moving slightly away the wiper of a potentiometer connected between the from these points. See Load Transient Response curves output and ground. A 10kΩ potentiometer is recom- for details. In general, best transient response is obtained mended, preferably a 20 turn cermet type with stable when the output is sourcing current. In critical applica- characteristics over time and temperature. tions, a 10µF solid tantalum capacitor with several ohms in series provides optimum output bypass. The LT1236-10 “A” version is pre-trimmed to ±5mV and therefore can utilize a restricted trim range. A 75k resistor 7
U U W U APPLICATIONS INFORMATION Effect of Reference Drift on System Accuracy
in series with a 20kΩ potentiometer will give ±10mV trim range. Effect on the output TC will be only 1ppm/°C for the A large portion of the temperature drift error budget in ±5mV trim needed to set the “A” device to 10.000V. many systems is the system reference voltage. This graph indicates the maximum temperature coefficient allowable
LT1236-5
if the reference is to contribute no more than 0.5LSB error to the overall system performance. The example shown is The LT1236-5 does have an output voltage trim pin, but a 12-bit system designed to operate over a temperature the TC of the nominal 4V open circuit voltage at pin 5 is range from 25°C to 65°C. Assuming the system calibra- about –1.7mV/°C. For the voltage trimming not to affect tion is performed at 25°C, the temperature span is 40°C. reference output TC, the external trim voltage must track It can be seen from the graph that the temperature coeffi- the voltage on the trim pin. Input impedance of the trim pin cient of the reference must be no worse than 3ppm/°C if is about 100kΩ and attenuation to the output is 13:1. The it is to contribute less than 0.5LBS error. For this reason, technique shown below is suggested for trimming the the LT1236 family has been optimized for low drift. output of the LT1236-5 while maintaining minimum shift in output temperature coefficient. The R1/R2 ratio is
Maximum Allowable Reference Drift
chosen to minimize interaction of trimming and TC shifts, 100 so the exact values shown should be used. 8-BIT °C) LT1236-5 10-BIT IN OUT VOUT 10 GND TRIM R1 27k R2 12-BIT 50k 0.5LSB ERROR (ppm/ 1N4148 14-BIT MAXIMUM TEMPERATURE COEFFICIENT FOR 1.0 LT1236 AI02 10 20 30 40 50 60 70 80 90 100 TEMPERATURE SPAN (°C)
Capacitive Loading and Transient Response
LT1236 AI01 The LT1236 is stable with all capacitive loads, but for
Trimming Output Voltage
optimum settling with load transients, output capacitance The LT1236-10 has a trim pin for adjusting output voltage. should be under 1000pF. The output stage of the reference The impedance of the trim pin is about 12kΩ with a is class AB with a fairly low idling current. This makes nominal open circuit voltage of 5V. It is designed to be transient response worse-case at light load currents. driven from a source impedance of 3kΩ or less to mini- Because of internal current drain on the output, actual mize changes in the LT1236 TC with output trimming. worst-case occurs at ILOAD = 0 on LT1236-5 and ILOAD = Attenuation between the trim pin and the output is 70:1. 1.4mA (sinking) on LT1236-10. Significantly better load This allows ±70mV trim range when the trim pin is tied to transient response is obtained by moving slightly away the wiper of a potentiometer connected between the from these points. See Load Transient Response curves output and ground. A 10kΩ potentiometer is recom- for details. In general, best transient response is obtained mended, preferably a 20 turn cermet type with stable when the output is sourcing current. In critical applica- characteristics over time and temperature. tions, a 10µF solid tantalum capacitor with several ohms in series provides optimum output bypass. The LT1236-10 “A” version is pre-trimmed to ±5mV and therefore can utilize a restricted trim range. A 75k resistor 7