Datasheet LTM4622A (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Dual Ultrathin 2A or Single 4A Step-Down DC/DC μModule Regulator |
| 页数 / 页 | 30 / 7 — PIN FUNCTIONS. PACKAGE ROW AND COLUMN LABELING MAY VARY. RUN1 (D2), RUN2 … |
| 修订版 | B |
| 文件格式/大小 | PDF / 878 Kb |
| 文件语言 | 英语 |
PIN FUNCTIONS. PACKAGE ROW AND COLUMN LABELING MAY VARY. RUN1 (D2), RUN2 (B2):. AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
该数据表的模型线
文件文字版本
LTM4622A
PIN FUNCTIONS PACKAGE ROW AND COLUMN LABELING MAY VARY RUN1 (D2), RUN2 (B2):
Run Control Input of Each Switch-
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
ing Mode Regulator Channel. Enables chip operation by
LAYOUT CAREFULLY.
tying RUN above 1.27V. Tying this pin below 1V shuts
V
down the specific regulator channel. Do not float this pin.
IN1 (D3, E2), VIN2 (A2, B3):
Power Input Pins. Apply input voltage between these pins and GND pins. Rec-
PGOOD1 (D4), PGOOD2 (B4):
Output Power Good with ommend placing input decoupling capacitance directly Open-Drain Logic of Each Switching Mode Regulator between BOTH VIN1 and VIN2 pins and GND pins. Please Channel. PGOOD is pulled to ground when the voltage note the module internal control circuity is running off on the FB pin is not within ±8% (typical) of the internal VIN1. Channel 2 will not work without a voltage higher that 0.6V reference. 3.6V presents at VIN1.
TRACK/SS1 (E3), TRACK/SS2 (A3):
Output Tracking
GND (C1 to C2, B5, D5):
Power Ground Pins for Both and Soft-Start Pin of Each Switching Mode Regulator Input and Output Returns. Channel. It allows the user to control the rise time of the
INTV
output voltage. Putting a voltage below 0.6V on this pin
CC (C3):
Internal 3.3V Regulator Output. The internal power drivers and control circuits are powered from this bypasses the internal reference input to the error ampli- voltage. This pin is internally decoupled to GND with a fier, instead it servos the FB pin to the TRACK voltage. 2.2µF low ESR ceramic capacitor. No additional external Above 0.6V, the tracking function stops and the internal decoupling capacitor needed. reference resumes control of the error amplifier. There’s an internal 1.4µA pull-up current from INTV
SYNC/MODE (C5):
Mode Select and External Synchroni- CC on this pin, so putting a capacitor here provides soft-start function. zation Input. Tie this pin to ground to force continuous A default internal soft-start ramp forces a minimum soft- synchronous operation at all output loads. Floating this pin start time of 400µs. or tying it to INTVCC enables high efficiency Burst Mode operation at light loads. Drive this pin with a clock to syn-
FB1 (E4), FB2 (A4):
The Negative Input of the Error chronize the LTM4622A switching frequency. An internal Amplifier for Each Switching Mode Regulator Channel. phase-locked loop will force the bottom power NMOS’s Internally, this pin is connected to VOUT with a 60.4k preci- turn on signal to be synchronized with the rising edge sion resistor. Different output voltages can be programmed of the clock signal. When this pin is driven with a clock, with an additional resistor between FB and GND pins. In forced continuous mode is automatically selected. PolyPhase® operation, tying the FB pins together allows for parallel operation. See the Applications Information
VOUT1 (D1, E1), VOUT2 (A1, B1):
Power Output Pins of section for details. Each Switching Mode Regulator. Apply output load between these pins and GND pins. Recommend placing output
COMP1 (E5), COMP2 (A5):
Current Control Threshold decoupling capacitance directly between these pins and and Error Amplifier Compensation Point of Each Switch- GND pins. ing Mode Regulator Channel. The current comparator’s trip threshold is linearly proportional to this voltage,
FREQ (C4):
Frequency is set internally to 1MHz. An whose normal range is from 0.3V to 1.8V. Tie the COMP external resistor can be placed from this pin to GND to pins together for parallel operation. The device is internal increase frequency, or from this pin to INTVCC to reduce compensated. Do not drive this pin. frequency. See the Applications Information section for frequency adjustment. Rev B For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Safety Considerations Layout Checklist/Example Package Description Package Photos Design Resources Related Parts
PIN FUNCTIONS PACKAGE ROW AND COLUMN LABELING MAY VARY RUN1 (D2), RUN2 (B2):
Run Control Input of Each Switch-
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
ing Mode Regulator Channel. Enables chip operation by
LAYOUT CAREFULLY.
tying RUN above 1.27V. Tying this pin below 1V shuts
V
down the specific regulator channel. Do not float this pin.
IN1 (D3, E2), VIN2 (A2, B3):
Power Input Pins. Apply input voltage between these pins and GND pins. Rec-
PGOOD1 (D4), PGOOD2 (B4):
Output Power Good with ommend placing input decoupling capacitance directly Open-Drain Logic of Each Switching Mode Regulator between BOTH VIN1 and VIN2 pins and GND pins. Please Channel. PGOOD is pulled to ground when the voltage note the module internal control circuity is running off on the FB pin is not within ±8% (typical) of the internal VIN1. Channel 2 will not work without a voltage higher that 0.6V reference. 3.6V presents at VIN1.
TRACK/SS1 (E3), TRACK/SS2 (A3):
Output Tracking
GND (C1 to C2, B5, D5):
Power Ground Pins for Both and Soft-Start Pin of Each Switching Mode Regulator Input and Output Returns. Channel. It allows the user to control the rise time of the
INTV
output voltage. Putting a voltage below 0.6V on this pin
CC (C3):
Internal 3.3V Regulator Output. The internal power drivers and control circuits are powered from this bypasses the internal reference input to the error ampli- voltage. This pin is internally decoupled to GND with a fier, instead it servos the FB pin to the TRACK voltage. 2.2µF low ESR ceramic capacitor. No additional external Above 0.6V, the tracking function stops and the internal decoupling capacitor needed. reference resumes control of the error amplifier. There’s an internal 1.4µA pull-up current from INTV
SYNC/MODE (C5):
Mode Select and External Synchroni- CC on this pin, so putting a capacitor here provides soft-start function. zation Input. Tie this pin to ground to force continuous A default internal soft-start ramp forces a minimum soft- synchronous operation at all output loads. Floating this pin start time of 400µs. or tying it to INTVCC enables high efficiency Burst Mode operation at light loads. Drive this pin with a clock to syn-
FB1 (E4), FB2 (A4):
The Negative Input of the Error chronize the LTM4622A switching frequency. An internal Amplifier for Each Switching Mode Regulator Channel. phase-locked loop will force the bottom power NMOS’s Internally, this pin is connected to VOUT with a 60.4k preci- turn on signal to be synchronized with the rising edge sion resistor. Different output voltages can be programmed of the clock signal. When this pin is driven with a clock, with an additional resistor between FB and GND pins. In forced continuous mode is automatically selected. PolyPhase® operation, tying the FB pins together allows for parallel operation. See the Applications Information
VOUT1 (D1, E1), VOUT2 (A1, B1):
Power Output Pins of section for details. Each Switching Mode Regulator. Apply output load between these pins and GND pins. Recommend placing output
COMP1 (E5), COMP2 (A5):
Current Control Threshold decoupling capacitance directly between these pins and and Error Amplifier Compensation Point of Each Switch- GND pins. ing Mode Regulator Channel. The current comparator’s trip threshold is linearly proportional to this voltage,
FREQ (C4):
Frequency is set internally to 1MHz. An whose normal range is from 0.3V to 1.8V. Tie the COMP external resistor can be placed from this pin to GND to pins together for parallel operation. The device is internal increase frequency, or from this pin to INTVCC to reduce compensated. Do not drive this pin. frequency. See the Applications Information section for frequency adjustment. Rev B For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Safety Considerations Layout Checklist/Example Package Description Package Photos Design Resources Related Parts