Datasheet LTM4642 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | 20VIN, Dual 4A or Single 8A DC/DC μModule Regulator |
| 页数 / 页 | 32 / 8 — pin FuncTions. PACKAGE ROW AND COLUMN LABELING MAY VARY. COMP1, COMP2 … |
| 文件格式/大小 | PDF / 1.1 Mb |
| 文件语言 | 英语 |
pin FuncTions. PACKAGE ROW AND COLUMN LABELING MAY VARY. COMP1, COMP2 (E3, D3. AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
该数据表的模型线
文件文字版本
LTM4642
pin FuncTions PACKAGE ROW AND COLUMN LABELING MAY VARY COMP1, COMP2 (E3, D3
): Current Control Threshold and
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
Error Amplifier Compensation Point. The module has been
LAYOUT CAREFULLY.
internally compensated for all I/O ranges.
GND (A4-A7, C2, D1, D5, E1, E5, E7, F7, H4-H7):
Power
FREQ (E4):
Frequency Selection Pin. Tie a resistor from ground pins for both input and output returns. this pin to SGND to set the frequency of operation between
PHASMD (B4):
Phase Mode Selection Pin for Program- 600kHz to 1.4MHz for the specific output voltages. For ming Clock Out Phase. See Electrical Characteristics and 3.3V input applications, 650kHz is an optimized frequency. Applications Information sections. For 5V to 20V input applications, the optimized operating
MODE/PLLIN (C3):
Mode Selection or External Synchroni- frequency for the output voltage is as follows: 0.8V to 1.2V zation Pin. Tying this pin to SGND enables discontinuous (650kHz), 1.5V to 1.8V (800kHz), 2.0V to 5V (1.2MHz), 5V mode. Tying this pin to INTV from 20V input (1.4MHz). The resistor equation: CC enables forced continuous operation. A clock on the pin will force the controller into R 41550 –2.2 the continuous mode of operation and synchronize the FREQ k ( Ω)= FREQ k(Hz) internal oscillator. The suitable synchronizable frequency range is 600kHz to 1400kHz subject to inductor ripple
DRVCC (E6):
This pin is the LDO 5.3V regulator output current limits described in the FREQ/PLLFLTR pin section. used to power the internal control circuits and MOSFET The external clock input high threshold is 2V, while the drivers. This pin needs a 4.7µF ceramic decoupling capaci- input low threshold is 0.5V. tor to GND. For input voltages less than or equal to 5.3V,
CPWR (C7):
This pin is the main input power to the control connect this pin directly to the input voltage. IC. This pin normally connects to the input source directly.
VOUTS1 (F2):
Output Voltage Sense Point for Channel 1 This pin can be biased at a voltage greater than 4.5V to Remote Sensing. This pin has a 49.9Ω resistor connected allow the VIN1 and VIN2 to operate down to 2.375V input for to VOUT1. This pin can be connected at the load point for applications that operate at 2.5V or 3.3V input. If the bias accurate remote sensing. is less than or equal to 5.3V, connect DRVCC to this pin.
V – OUTS (F3):
Remote Ground Sense Pin. Connect at remote
SGND (D2, E2):
Signal Ground Pins. Return ground path ground point. for all analog and low power circuitry. Tie a single connec-
V
tion to PGND in the application. See the Recommended
FB1, VFB2 (F4, C4):
The negative input of the error amplifier. Internally, this pin is connected to V Layout section. OUT with a 60.4k precision resistor. Different output voltages can
CLKOUT (D4):
Clock Out for Synchronizing Other Regula- be programmed with an additional resistor between VFB tors to the Common Clock. Used for multiphase applica- and SGND pins. See the Applications Information section tions. See Applications Information section. for details.
EXTVCC (D6):
External Power Input to Controller. When
TRACK/SS1, TRACK/SS2 (F5, C5):
Output Voltage Tracking EXTVCC is higher than 4.7V, the internal 5.3V regulator is and Soft-Start Pins. Internal soft-start currents of 1.0µA disabled and the external source supplies current to reduce charge the soft-start capacitors. See the Applications the power dissipation in the module. This will improve the Information section to use the tracking function. efficiency more at high input voltages.
PGOOD1, PGOOD2 (F6, C6):
Output Voltage Power Good
INTVCC (D7):
This pin powers the internal control circuits. Indicator. Open-drain logic output that is pulled to ground Tie this pin to DRVCC with a 2.2Ω resistor. This pin requires when the output voltage is not within ±7.5% of the regula- a few milliamps. tion point. In single output parallel operation when VFB2 is tied to INTVCC, the PGOOD2 pin is not to be used. 4642fb 8 For more information www.linear.com/LTM4642 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photograph Design Resources Related Parts
pin FuncTions PACKAGE ROW AND COLUMN LABELING MAY VARY COMP1, COMP2 (E3, D3
): Current Control Threshold and
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
Error Amplifier Compensation Point. The module has been
LAYOUT CAREFULLY.
internally compensated for all I/O ranges.
GND (A4-A7, C2, D1, D5, E1, E5, E7, F7, H4-H7):
Power
FREQ (E4):
Frequency Selection Pin. Tie a resistor from ground pins for both input and output returns. this pin to SGND to set the frequency of operation between
PHASMD (B4):
Phase Mode Selection Pin for Program- 600kHz to 1.4MHz for the specific output voltages. For ming Clock Out Phase. See Electrical Characteristics and 3.3V input applications, 650kHz is an optimized frequency. Applications Information sections. For 5V to 20V input applications, the optimized operating
MODE/PLLIN (C3):
Mode Selection or External Synchroni- frequency for the output voltage is as follows: 0.8V to 1.2V zation Pin. Tying this pin to SGND enables discontinuous (650kHz), 1.5V to 1.8V (800kHz), 2.0V to 5V (1.2MHz), 5V mode. Tying this pin to INTV from 20V input (1.4MHz). The resistor equation: CC enables forced continuous operation. A clock on the pin will force the controller into R 41550 –2.2 the continuous mode of operation and synchronize the FREQ k ( Ω)= FREQ k(Hz) internal oscillator. The suitable synchronizable frequency range is 600kHz to 1400kHz subject to inductor ripple
DRVCC (E6):
This pin is the LDO 5.3V regulator output current limits described in the FREQ/PLLFLTR pin section. used to power the internal control circuits and MOSFET The external clock input high threshold is 2V, while the drivers. This pin needs a 4.7µF ceramic decoupling capaci- input low threshold is 0.5V. tor to GND. For input voltages less than or equal to 5.3V,
CPWR (C7):
This pin is the main input power to the control connect this pin directly to the input voltage. IC. This pin normally connects to the input source directly.
VOUTS1 (F2):
Output Voltage Sense Point for Channel 1 This pin can be biased at a voltage greater than 4.5V to Remote Sensing. This pin has a 49.9Ω resistor connected allow the VIN1 and VIN2 to operate down to 2.375V input for to VOUT1. This pin can be connected at the load point for applications that operate at 2.5V or 3.3V input. If the bias accurate remote sensing. is less than or equal to 5.3V, connect DRVCC to this pin.
V – OUTS (F3):
Remote Ground Sense Pin. Connect at remote
SGND (D2, E2):
Signal Ground Pins. Return ground path ground point. for all analog and low power circuitry. Tie a single connec-
V
tion to PGND in the application. See the Recommended
FB1, VFB2 (F4, C4):
The negative input of the error amplifier. Internally, this pin is connected to V Layout section. OUT with a 60.4k precision resistor. Different output voltages can
CLKOUT (D4):
Clock Out for Synchronizing Other Regula- be programmed with an additional resistor between VFB tors to the Common Clock. Used for multiphase applica- and SGND pins. See the Applications Information section tions. See Applications Information section. for details.
EXTVCC (D6):
External Power Input to Controller. When
TRACK/SS1, TRACK/SS2 (F5, C5):
Output Voltage Tracking EXTVCC is higher than 4.7V, the internal 5.3V regulator is and Soft-Start Pins. Internal soft-start currents of 1.0µA disabled and the external source supplies current to reduce charge the soft-start capacitors. See the Applications the power dissipation in the module. This will improve the Information section to use the tracking function. efficiency more at high input voltages.
PGOOD1, PGOOD2 (F6, C6):
Output Voltage Power Good
INTVCC (D7):
This pin powers the internal control circuits. Indicator. Open-drain logic output that is pulled to ground Tie this pin to DRVCC with a 2.2Ω resistor. This pin requires when the output voltage is not within ±7.5% of the regula- a few milliamps. tion point. In single output parallel operation when VFB2 is tied to INTVCC, the PGOOD2 pin is not to be used. 4642fb 8 For more information www.linear.com/LTM4642 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photograph Design Resources Related Parts