Datasheet LTM4636 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 40A DC/DC μModule Regulator |
| 页数 / 页 | 36 / 9 — block DiagraM. Figure 1. Simplified LTM4636 Block Diagram |
| 文件格式/大小 | PDF / 1.2 Mb |
| 文件语言 | 英语 |
block DiagraM. Figure 1. Simplified LTM4636 Block Diagram
该数据表的模型线
文件文字版本
LTM4636
block DiagraM
, IN V CC 2200pF + > 5.5V , TIE TO V IN 0.85V AND P TE AS SHOWN TEMP – 0.85V) (15K) 15k IN ≤ 5.5V V CC (V 22µF V IN 4.70V TO 15V V IN INT TOGETHER,TIE RUNP TO GND. V OPERA T 40A 2.2Ω, 0805 V OUT C OUT R1 = C IN R1 1.5V A UVLO + + V IN EXAMPLE 4636 F01 – – CC M – + V IN SW PV V OUT GND RUNP TEMP GMON TMON PW 2.2Ω SNSP2 TEMP V OUTS1 V OUTS1 SGND F 1µ – SNS CONNECT TO SNSP1 > 0.85V = ON TOR WORK 0.18µH 470pF V IN DCR SENSE NET SNSP2 5V Q1 CCPV M1 M2 INTERNAL 5V REGULA F 1µ V V TDR BDR T 25°C T 150°C IMON 40µA A 60µA A PWM LOGIC CONTOL, POWER MOSFET DRIVERS, POWER MOSFET TEMP MONITOR CURRENT 24.9k 1% TIMIZED µF OP DEAD TIME CONTROL PWM INPUT 150C DISABLE DISABLE 0.1 M T PCB SNSP1 TEST4 PW + SENSE – – CURRENT SNS SNSP1 AND SNSP2 – CONNECTED A DIFF 4.99k 0.5% AMP +
Figure 1. Simplified LTM4636 Block Diagram
V FB POWER CONTROL 10pF 4.7µF 10k 1% 5.5V COMP INTERNAL A VCC TEST1 TEST2 TEST3 PGOOD RUNC COMP COMPB SGND HIZREG CLKOUT PHMODE FREQ TRACK/SS MODE_PLLIN INT SNSP1 V FB 10k V CC µF R6 0.1 V CC R FREQ 40k 3.32k INT T 15k CC INT AR PV T-ST ≥ 5V SOF CC T ~ 3.75V PV > 1.35V = ON UVLO EXAMPLE – 1.35V)(10k)/1.35V DISABLES A V CC 15k = (P 4636f For more information www.linear.com/LTM4636 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photo Typical Application Design Resources Related Parts
block DiagraM
, IN V CC 2200pF + > 5.5V , TIE TO V IN 0.85V AND P TE AS SHOWN TEMP – 0.85V) (15K) 15k IN ≤ 5.5V V CC (V 22µF V IN 4.70V TO 15V V IN INT TOGETHER,TIE RUNP TO GND. V OPERA T 40A 2.2Ω, 0805 V OUT C OUT R1 = C IN R1 1.5V A UVLO + + V IN EXAMPLE 4636 F01 – – CC M – + V IN SW PV V OUT GND RUNP TEMP GMON TMON PW 2.2Ω SNSP2 TEMP V OUTS1 V OUTS1 SGND F 1µ – SNS CONNECT TO SNSP1 > 0.85V = ON TOR WORK 0.18µH 470pF V IN DCR SENSE NET SNSP2 5V Q1 CCPV M1 M2 INTERNAL 5V REGULA F 1µ V V TDR BDR T 25°C T 150°C IMON 40µA A 60µA A PWM LOGIC CONTOL, POWER MOSFET DRIVERS, POWER MOSFET TEMP MONITOR CURRENT 24.9k 1% TIMIZED µF OP DEAD TIME CONTROL PWM INPUT 150C DISABLE DISABLE 0.1 M T PCB SNSP1 TEST4 PW + SENSE – – CURRENT SNS SNSP1 AND SNSP2 – CONNECTED A DIFF 4.99k 0.5% AMP +
Figure 1. Simplified LTM4636 Block Diagram
V FB POWER CONTROL 10pF 4.7µF 10k 1% 5.5V COMP INTERNAL A VCC TEST1 TEST2 TEST3 PGOOD RUNC COMP COMPB SGND HIZREG CLKOUT PHMODE FREQ TRACK/SS MODE_PLLIN INT SNSP1 V FB 10k V CC µF R6 0.1 V CC R FREQ 40k 3.32k INT T 15k CC INT AR PV T-ST ≥ 5V SOF CC T ~ 3.75V PV > 1.35V = ON UVLO EXAMPLE – 1.35V)(10k)/1.35V DISABLES A V CC 15k = (P 4636f For more information www.linear.com/LTM4636 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photo Typical Application Design Resources Related Parts