Datasheet LTM4624 (Analog Devices) - 6

LTM4624
PIN FUNCTIONS PACKAGE ROW AND COLUMN LABELING MAY VARY GND (B3, C3, D3-D4, E3):
Power Ground Pins for Both
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
Input and Output Returns.
LAYOUT CAREFULLY. SGND (B4):
Signal Ground Connection. Tie to GND with
COMP (A1):
Current Control Threshold and Error Amplifier minimum distance. Connect FREQ resistor, COMP com- Compensation Point. The current comparator’s trip thresh- ponent, MODE, TRACK/SS component, FB resistor to this old is linearly proportional to this voltage, whose normal pin as needed. range is from 0.3V to 1.8V. Tie the COMP pins together for parallel operation. The device is internally compensated.
VOUT (C1, D1-D2, E1-E2):
Power Output Pins. Apply out- put load between these pins and GND pins. Recommend
TRACK/SS (A2):
Output Tracking and Soft-Start Input. placing output decoupling capacitance directly between Allows the user to control the rise time of the output volt- these pins and GND pins. age. Putting a voltage below 0.6V on this pin bypasses the internal reference input to the error amplifier, and servos
PGOOD (C2):
Output Power Good with Open-Drain Logic. the FB pin to match the TRACK/SS voltage. Above 0.6V, PGOOD is pulled to ground when the voltage on the FB pin the tracking function stops and the internal reference is not within ±10% of the internal 0.6V reference. resumes control of the error amplifier. There’s an internal
MODE (C4):
Operation Mode Select. Tie this pin to INTV 2.5µA pull-up current from INTV CC CC on this pin, so putting to force continuous synchronous operation at all output a capacitor here provides a soft-start function. loads. Tying it to SGND enables discontinuous mode
RUN (A3):
Run Control Input of the Switching Mode operation at light loads. Do not leave floating. Regulator. Enables chip operation by tying RUN above
SV
1.25V. Pulling it below 1.1V shuts down the part. Do not
IN (C5):
Signal VIN. Filtered input voltage to the on-chip 3.3V regulator. Tie this pin to the V leave floating. IN pin in most applica- tions. Connect SVIN to an external voltage supply of at
FREQ (A4):
Frequency is set internally to 1MHz. An ex- least 4V which must also be greater than VOUT. ternal resistor can be placed from this pin to SGND to
V
increase frequency, or from this pin to INTV
IN (D5, E5):
Power Input Pins. Apply input voltage be- CC to reduce tween these pins and GND pins. Recommend placing frequency. See the Applications Information section for input decoupling capacitance directly between V frequency adjustment. IN pins and GND pins.
NC (A5, B2, B5):
No Connect Pins. Pins are not connected
INTV
internally. Float or ground these pins.
CC (E4):
Internal 3.3V Regulator Output. The internal power drivers and control circuits are powered from this
FB (B1):
The Negative Input of the Error Amplifier. Internally, voltage. This pin is internally decoupled to GND with a 1µF this pin is connected to VOUT with a 60.4k precision resis- low ESR ceramic capacitor. tor. Different output voltages can be programmed with an additional resistor between the FB and SGND pins. Tying the FB pins together allows for parallel operation. See the Applications Information section for details. 4624fd 6 For more information www.linear.com/LTM4624 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Package Description Package Photo Design Resources Related Parts