Datasheet LTM4620 (Analog Devices) - 8

LTM4620
PIN FUNCTIONS (Recommended to Use Test Points to Monitor Signal Pin Connections.) PACKAGE ROW AND COLUMN LABELING MAY VARY VFB1, VFB2 (D5, D7):
The Negative Input of the Error
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
Amplifier for Each Channel. Internally, this pin is con-
LAYOUT CAREFULLY.
nected to VOUTS1 or VOUTS2 with a 60.4kΩ precision
VOUT1 (A1-A5, B1-B5, C1-C4):
Power Output Pins. resistor. Different output voltages can be programmed Apply output load between these pins and GND pins. with an additional resistor between VFB and GND pins. In Recommend placing output decoupling capacitance PolyPhase® operation, tying the VFB pins together allows directly between these pins and GND pins. Review Table for parallel operation. See the Applications Information 4. See Note 8 in the Electrical Characteristics section for section for details. output current guideline.
TRACK1, TRACK2 (E5, D8):
Output Voltage Tracking Pin
GND (A6-A7, B6-B7, D1-D4, D9-D12, E1-E4, E10-E12,
and Soft-Start Inputs. Each channel has a 1.3µA pull-up
F1-F3, F10-F12, G1, G3, G10, G12, H1-H7, H9-H12, J1,
current source. When one channel is configured to be
J5, J8, J12, K1, K5-K8, K12, L1, L12, M1 , M12):
Power master of the two channels, then a capacitor from this pin Ground Pins for Both Input and Output Returns. to ground will set a soft-start ramp rate. The remaining
V
channel can be set up as the slave, and have the master’s
OUT2 (A8-A12, B8-B12, C9-C12):
Power Output Pins. Apply output load between these pins and GND pins. output applied through a voltage divider to the slave out- Recommend placing output decoupling capacitance put’s track pin. This voltage divider is equal to the slave directly between these pins and GND pins. Review Table 4. output’s feedback divider for coincidental tracking. See See Note 8 in the Electrical Characteristics section for the Applications Information section. output current guideline.
COMP1, COMP2 (E6, E7):
Current control threshold and
V
error amplifier compensation point for each channel. The
OUTS1, VOUTS2 (C5, C8):
This pin is connected to the top of the internal top feedback resistor for each output. The current comparator threshold increases with this control pin can be directly connected to its specific output, or voltage. Tie the COMP pins together for parallel operation. connected to DIFFOUT when the remote sense amplifier is The device is internal compensated. used. In paralleling modules, one of the VOUTS pins is con-
DIFFP (E8):
Positive input of the remote sense amplifier. nected to the DIFFOUT pin in remote sensing or directly This pin is connected to the remote sense point of the to VOUT with no remote sensing. It is very important to output voltage. See the Applications Information section. connect these pins to either the DIFFOUT or VOUT since this is the feedback path, and cannot be left open. See the
DIFFN (E9):
Negative input of the remote sense amplifier. Applications Information section. This pin is connected to the remote sense point of the output GND. See the Applications Information section.
fSET (C6):
Frequency Set Pin. A 10µA current is sourced from this pin. A resistor from this pin to ground sets a
MODE_PLLIN (F4):
Force Continuous Mode, Burst Mode voltage that in turn programs the operating frequency. Operation, or Pulse-Skipping Mode Selection Pin and Alternatively, this pin can be driven with a DC voltage External Synchronization Input to Phase Detector Pin. that can set the operating frequency. See the Applications Connect this pin to SGND to force both channels into Information section. force continuous mode of operation. Connect to INTVCC to enable pulse-skipping mode of operation. Leaving the
SGND (C7, D6, G6-G7, F6-F7):
Signal Ground Pin. Return pin floating will enable Burst Mode operation. A clock on ground path for all analog and low power circuitry. Tie the pin will force both channels into continuous mode of a single connection to the output capacitor GND in the operation and synchronized to the external clock applied application. See layout guidelines in Figure 22. to this pin.
Heat Sink (Top Exposed Metal):
The top exposed metal is at ground potential. 4620fc 8 For more information www.linear.com/LTM4620 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photo Related Parts