Datasheet LTM4611 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | Ultralow VIN, 15A DC/DC µModule Regulator |
| 页数 / 页 | 30 / 4 — elecTrical characTerisTics. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 493 Kb |
| 文件语言 | 英语 |
elecTrical characTerisTics. The. denotes the specifications which apply over the full internal operating
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LTM4611
elecTrical characTerisTics The
l
denotes the specifications which apply over the full internal operating junction temperature range, otherwise specifications are at TA = 25°C, VIN = 3.3V, per the typical application in Figure 21. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Control Section
VFB Voltage at VFB Pin IOUT = 0A, VOUT = VFB l 0.783 0.797 0.811 V IFB –10 nA VOVL Feedback Overvoltage Lockout l 0.84 0.87 0.89 V ITRACK/SS Track Pin Soft-Start Pul -Up TRACK/SS = 0V 0.9 1.4 1.9 µA Current tON(MIN) Minimum On-Time (Note 5) 90 ns RFBHI Resistor Between VOUT_LCL 60.05 60.40 60.75 kΩ and VFB Pins V + OSNS , Common Mode Input Range VIN = 3.3V, Run > 1.5V 0 INTVCC – 1 V VOSNS– CM RANGE DIFFVOUT Range DIFF_AMP Output Voltage Range VIN = 3.3V, DIFFVOUT Load = 100k 0 INTVCC V VOS DIFF_AMP Input Offset Voltage 1.25 mV Magnitude l 2 mV AV DIFF_AMP Differential Gain 1 V/V VPGOOD PGOOD Trip Level VFB with Respect to Set Output VFB Ramping Positive, PGOOD Transitioning –10 –7.5 –5 % VFB Ramping Positive, PGOOD Transitioning 5 7.5 10 % VFB Ramping Negative, PGOOD Transitioning 5 7.5 10 % VFB Ramping Negative, PGOOD Transitioning –10 –7.5 –5 % SR DIFF_AMP Slew Rate 2 V/µs GBP DIFF_AMP Gain-Bandwidth 3 MHz Product CMRR DIFF_AMP Common Mode 100 dB Rejection RIN DIFF_AMP Input Resistance VOSNS+ to GND 19.9 20.0 20.1 kΩ
INTVCC Linear Regulator
VINTVCC Internal VCC Voltage 1.5V < VIN < 5.5V 4.8 5 5.2 V VINTVCC Load Reg INTVCC Load Regulation ICC = 0 to 50mA 0.5 %
Oscillator and Phase-Locked Loop
fS Output Ripple Voltage Frequency VIN = 3.3V, VOUT = 1.5V, 280 835 kHz 0.85V ≤ PLLFLTR/fSET ≤ 2.0V fSYNC SYNC Capture Range 360 710 kHz PLLFLTR/fSET(FLOAT) PLLFLTR/fSET Open-Circuit PLLFLTR/fSET Pin Voltage When Floating 1.23 V Voltage Frequency Nominal Nominal Frequency PLLFLTR/fSET Floating 500 kHz Frequency Low Lowest Frequency PLLFLTR/fSET = 0.85V 330 kHz Frequency High Highest Frequency PLLFLTR/fSET = 2.0V 780 kHz IPLLFLTR PLLFLTR Sourcing Capability Mode_PLLIN Frequency > fOSC –13 µA Sinking Capability Mode_PLLIN Frequency < fOSC 13 µA RMODE(PLLIN) Mode_PLLIN Input Resistance 250 kΩ VIH Clock Input Level High 2.0 V VIL Clock Input Level Low 0.6 V Mode_PLLIN Clock Input Duty Cycle Range 40 50 60 % Clock 4611fb 4 For more information www.linear.com/LTM4611 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Photograph Package Description Revision History Typical Application Related Parts
elecTrical characTerisTics The
l
denotes the specifications which apply over the full internal operating junction temperature range, otherwise specifications are at TA = 25°C, VIN = 3.3V, per the typical application in Figure 21. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Control Section
VFB Voltage at VFB Pin IOUT = 0A, VOUT = VFB l 0.783 0.797 0.811 V IFB –10 nA VOVL Feedback Overvoltage Lockout l 0.84 0.87 0.89 V ITRACK/SS Track Pin Soft-Start Pul -Up TRACK/SS = 0V 0.9 1.4 1.9 µA Current tON(MIN) Minimum On-Time (Note 5) 90 ns RFBHI Resistor Between VOUT_LCL 60.05 60.40 60.75 kΩ and VFB Pins V + OSNS , Common Mode Input Range VIN = 3.3V, Run > 1.5V 0 INTVCC – 1 V VOSNS– CM RANGE DIFFVOUT Range DIFF_AMP Output Voltage Range VIN = 3.3V, DIFFVOUT Load = 100k 0 INTVCC V VOS DIFF_AMP Input Offset Voltage 1.25 mV Magnitude l 2 mV AV DIFF_AMP Differential Gain 1 V/V VPGOOD PGOOD Trip Level VFB with Respect to Set Output VFB Ramping Positive, PGOOD Transitioning –10 –7.5 –5 % VFB Ramping Positive, PGOOD Transitioning 5 7.5 10 % VFB Ramping Negative, PGOOD Transitioning 5 7.5 10 % VFB Ramping Negative, PGOOD Transitioning –10 –7.5 –5 % SR DIFF_AMP Slew Rate 2 V/µs GBP DIFF_AMP Gain-Bandwidth 3 MHz Product CMRR DIFF_AMP Common Mode 100 dB Rejection RIN DIFF_AMP Input Resistance VOSNS+ to GND 19.9 20.0 20.1 kΩ
INTVCC Linear Regulator
VINTVCC Internal VCC Voltage 1.5V < VIN < 5.5V 4.8 5 5.2 V VINTVCC Load Reg INTVCC Load Regulation ICC = 0 to 50mA 0.5 %
Oscillator and Phase-Locked Loop
fS Output Ripple Voltage Frequency VIN = 3.3V, VOUT = 1.5V, 280 835 kHz 0.85V ≤ PLLFLTR/fSET ≤ 2.0V fSYNC SYNC Capture Range 360 710 kHz PLLFLTR/fSET(FLOAT) PLLFLTR/fSET Open-Circuit PLLFLTR/fSET Pin Voltage When Floating 1.23 V Voltage Frequency Nominal Nominal Frequency PLLFLTR/fSET Floating 500 kHz Frequency Low Lowest Frequency PLLFLTR/fSET = 0.85V 330 kHz Frequency High Highest Frequency PLLFLTR/fSET = 2.0V 780 kHz IPLLFLTR PLLFLTR Sourcing Capability Mode_PLLIN Frequency > fOSC –13 µA Sinking Capability Mode_PLLIN Frequency < fOSC 13 µA RMODE(PLLIN) Mode_PLLIN Input Resistance 250 kΩ VIH Clock Input Level High 2.0 V VIL Clock Input Level Low 0.6 V Mode_PLLIN Clock Input Duty Cycle Range 40 50 60 % Clock 4611fb 4 For more information www.linear.com/LTM4611 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Photograph Package Description Revision History Typical Application Related Parts