Datasheet LTM4601, LTM4601-1 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | 12A µModule Regulator with PLL, Output Tracking and Margining |
| 页数 / 页 | 30 / 7 — pin FuncTions (See Package Description for Pin Assignment) VIN (Bank 1):. … |
| 文件格式/大小 | PDF / 964 Kb |
| 文件语言 | 英语 |
pin FuncTions (See Package Description for Pin Assignment) VIN (Bank 1):. TRACK/SS (Pin A9):. OUT (Bank 3):. PGND (Bank 2):
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LTM4601/LTM4601-1
pin FuncTions (See Package Description for Pin Assignment) VIN (Bank 1):
Power Input Pins. Apply input voltage be-
TRACK/SS (Pin A9):
Output Voltage Tracking and Soft- tween these pins and PGND pins. Recommend placing Start Pin. When the module is configured as a master input decoupling capacitance directly between VIN pins output, then a soft-start capacitor is placed from this pin and PGND pins. to ground to control the master ramp rate. A soft-start
V
capacitor can also be used for soft-start turn-on of a stand
OUT (Bank 3):
Power Output Pins. Apply output load between these pins and PGND pins. Recommend placing alone regulator. Slave operation is performed by putting output decoupling capacitance directly between these pins a resistor divider from the master output to the ground, and PGND pins. See Figure 15. and connecting the center point of the divider to this pin. See the Applications Information section.
PGND (Bank 2):
Power ground pins for both input and output returns.
MPGM (Pin A12):
Programmable Margining Input. A re- sistor from this pin to ground sets a current that is equal
V – OSNS (Pin M12):
(–) Input to the Remote Sense Ampli- to 1.18V/R. This current multiplied by 10kW will equal a fier. This pin connects to the ground remote sense point. value in millivolts that is a percentage of the 0.6V refer- The remote sense amplifier is used for VOUT ≤3.3V. Tie to ence voltage. See the Applications Information section. INTVCC if not used. To parallel LTM4601s, each requires an individual MPGM
NC1 (Pin M12):
No internal connection on the LTM4601-1. resistor. Do not tie MPGM pins together.
V + OSNS (Pin J12):
(+) Input to the Remote Sense Ampli-
fSET (Pin B12):
Frequency Set Internally to 850kHz. An fier. This pin connects to the output remote sense point. external resistor can be placed from this pin to ground The remote sense amplifier is used for VOUT ≤3.3V. Tie to to increase frequency. See the Applications Information ground if not used. section for frequency adjustment.
NC2 (Pin J12):
No internal connection on the LTM4601-1.
VFB (Pin F12):
The Negative Input of the Error Amplifier. Internally, this pin is connected to V
DIFFV
OUT_LCL pin with a
OUT (Pin K12):
Output of the Remote Sense Ampli- 60.4k precision resistor. Different output voltages can be fier. This pin connects to the VOUT_LCL pin. Leave floating programmed with an additional resistor between V if not used. FB and SGND pins. See the Applications Information section.
NC3 (Pin K12):
No internal connection on the LTM4601-1.
MARG0 (Pin C12):
This pin is the LSB logic input for the
DRVCC (Pin E12):
This pin normally connects to INTVCC margining function. Together with the MARG1 pin it will for powering the internal MOSFET drivers. This pin can be determine if margin high, margin low or no margin state biased up to 6V from an external supply with about 50mA is applied. The pin has an internal pull-down resistor of capability, or an external circuit as shown in Figure 16. 50k. See the Applications Information section. This improves efficiency at the higher input voltages by
MARG1 (Pin D12):
This pin is the MSB logic input for the reducing power dissipation in the module. margining function. Together with the MARG0 pin it will
INTVCC (Pin A7):
This pin is for additional decoupling of determine if margin high, margin low or no margin state the 5V internal regulator. is applied. The pin has an internal pull-down resistor of
PLLIN (Pin A8):
External Clock Synchronization Input 50k. See the Applications Information section. to the Phase Detector. This pin is internally terminated to SGND with a 50k resistor. Apply a clock with a high level above 2V and below INTVCC. See the Applications Information section. 4601fe For more information www.linear.com/LTM4601 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Revision History Package Photo Related Parts
pin FuncTions (See Package Description for Pin Assignment) VIN (Bank 1):
Power Input Pins. Apply input voltage be-
TRACK/SS (Pin A9):
Output Voltage Tracking and Soft- tween these pins and PGND pins. Recommend placing Start Pin. When the module is configured as a master input decoupling capacitance directly between VIN pins output, then a soft-start capacitor is placed from this pin and PGND pins. to ground to control the master ramp rate. A soft-start
V
capacitor can also be used for soft-start turn-on of a stand
OUT (Bank 3):
Power Output Pins. Apply output load between these pins and PGND pins. Recommend placing alone regulator. Slave operation is performed by putting output decoupling capacitance directly between these pins a resistor divider from the master output to the ground, and PGND pins. See Figure 15. and connecting the center point of the divider to this pin. See the Applications Information section.
PGND (Bank 2):
Power ground pins for both input and output returns.
MPGM (Pin A12):
Programmable Margining Input. A re- sistor from this pin to ground sets a current that is equal
V – OSNS (Pin M12):
(–) Input to the Remote Sense Ampli- to 1.18V/R. This current multiplied by 10kW will equal a fier. This pin connects to the ground remote sense point. value in millivolts that is a percentage of the 0.6V refer- The remote sense amplifier is used for VOUT ≤3.3V. Tie to ence voltage. See the Applications Information section. INTVCC if not used. To parallel LTM4601s, each requires an individual MPGM
NC1 (Pin M12):
No internal connection on the LTM4601-1. resistor. Do not tie MPGM pins together.
V + OSNS (Pin J12):
(+) Input to the Remote Sense Ampli-
fSET (Pin B12):
Frequency Set Internally to 850kHz. An fier. This pin connects to the output remote sense point. external resistor can be placed from this pin to ground The remote sense amplifier is used for VOUT ≤3.3V. Tie to to increase frequency. See the Applications Information ground if not used. section for frequency adjustment.
NC2 (Pin J12):
No internal connection on the LTM4601-1.
VFB (Pin F12):
The Negative Input of the Error Amplifier. Internally, this pin is connected to V
DIFFV
OUT_LCL pin with a
OUT (Pin K12):
Output of the Remote Sense Ampli- 60.4k precision resistor. Different output voltages can be fier. This pin connects to the VOUT_LCL pin. Leave floating programmed with an additional resistor between V if not used. FB and SGND pins. See the Applications Information section.
NC3 (Pin K12):
No internal connection on the LTM4601-1.
MARG0 (Pin C12):
This pin is the LSB logic input for the
DRVCC (Pin E12):
This pin normally connects to INTVCC margining function. Together with the MARG1 pin it will for powering the internal MOSFET drivers. This pin can be determine if margin high, margin low or no margin state biased up to 6V from an external supply with about 50mA is applied. The pin has an internal pull-down resistor of capability, or an external circuit as shown in Figure 16. 50k. See the Applications Information section. This improves efficiency at the higher input voltages by
MARG1 (Pin D12):
This pin is the MSB logic input for the reducing power dissipation in the module. margining function. Together with the MARG0 pin it will
INTVCC (Pin A7):
This pin is for additional decoupling of determine if margin high, margin low or no margin state the 5V internal regulator. is applied. The pin has an internal pull-down resistor of
PLLIN (Pin A8):
External Clock Synchronization Input 50k. See the Applications Information section. to the Phase Detector. This pin is internally terminated to SGND with a 50k resistor. Apply a clock with a high level above 2V and below INTVCC. See the Applications Information section. 4601fe For more information www.linear.com/LTM4601 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Revision History Package Photo Related Parts