Datasheet LTM4600HV (Analog Devices) - 10

LTM4600HV
applicaTions inForMaTion
The typical LTM4600HV application circuit is shown in down when QDOWN is on and QUP is off. If the output Figure 21. External component selection is primarily de- voltage VO needs to be margined up/down by ±M%, the termined by the maximum load current and output voltage. resistor values of RUP and RDOWN can be calculated from the following equations:
Output Voltage Programming and Margining
(RSET RUP)• VO •(1+M%) The PWM controller of the LTM4600HV has an internal = 0.6V 0.6V±1% reference voltage. As shown in the block dia- (RSET RUP)+100kΩ gram, a 100k/0.5% internal feedback resistor connects R V SET • VO • (1– M%) OUT and VOSET pins. Adding a resistor RSET from VOSET = 0.6V pin to SGND pin programs the output voltage: RSET +(100kΩ RDOWN) 100k V +RSET O = 0.6V •
Input Capacitors
RSET The LTM4600HV µModule should be connected to a low Table 1 shows the standard values of 1% RSET resistor ac-impedance DC source. High frequency, low ESR input for typical output voltages: capacitors are required to be placed adjacent to the mod-
Table 1.
ule. In Figure 21, the bulk input capacitor CIN is selected
R
for its ability to handle the large RMS current into the
SET (k
Ω
)
Open 100 66.5 49.9 43.2 31.6 22.1 13.7 converter. For a buck converter, the switching duty-cycle
VO
can be estimated as:
(V)
0.6 1.2 1.5 1.8 2 2.5 3.3 5 V Voltage margining is the dynamic adjustment of the output D = O voltage to its worst case operating range in production VIN testing to stress the load circuitry, verify control/protec- Without considering the inductor current ripple, the RMS tion functionality of the board and improve the system current of the input capacitor can be estimated as: reliability. Figure 2 shows how to implement margining function with the LTM4600HV. In addition to the feedback I I O(MAX) CIN(RMS) = • D •(1−D) resistor RSET, several external components are added. η% Turn off both transistor QUP and QDOWN to disable the margining. When QUP is on and QDOWN is off, the output In the above equation, η% is the estimated efficiency of voltage is margined up. The output voltage is margined the power module. C1 can be a switcher-rated electrolytic aluminum capacitor, OS-CON capacitor or high volume VOUT ceramic capacitors. Note the capacitor ripple current LTM4600HV ratings are often based on only 2000 hours of life. This RDOWN makes it advisable to properly derate the input capacitor, 100k or choose a capacitor rated at a higher temperature than QDOWN required. Always contact the capacitor manufacturer for VOSET 2N7002 derating requirements over temperature. PGND SGND RSET RUP In Figure 21, the input capacitors are used as high fre- quency input decoupling capacitors. In a typical 10A QUP output application, 1-2 pieces of very low ESR X5R or 2N7002 X7R (for extended temperature range), 10µF ceramic 4600hv F02 capacitors are recommended. This decoupling capacitor
Figure 2. LTM4600HV Margining Implementation
should be placed directly adjacent the module input pins 4600hvfe 10 For more information www.linear.com/LTM4600HV Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts