Datasheet LTM4600 (Analog Devices) - 10

LTM4600
applicaTions inForMaTion
The typical LTM4600 application circuit is shown in Figure voltage is margined up. The output voltage is margined 18. External component selection is primarily determined down when QDOWN is on and QUP is off. If the output by the maximum load current and output voltage. voltage VO needs to be margined up/down by ±M%, the resistor values of RUP and RDOWN can be calculated from
Output Voltage Programming and Margining
the following equations: The PWM controller of the LTM4600 has an internal (RSET RUP)• VO •(1+M%) 0.6V±1% reference voltage. As shown in the block dia- = 0.6V gram, a 100k/0.5% internal feedback resistor connects (RSET RUP)+100kΩ VOUT and VOSET pins. Adding a resistor RSET from VOSET RSET • VO •(1–M%) pin to SGND pin programs the output voltage: = 0.6V RSET +(100kΩ RDOWN) 100k V +RSET O = 0.6V • RSET
Input Capacitors
Table 1 shows the standard values of 1% R The LTM4600 µModule should be connected to a low SET resistor for typical output voltages: ac-impedance DC source. High frequency, low ESR input capacitors are required to be placed adjacent to the mod-
Table 1.
ule. In Figure 18, the bulk input capacitor C
R
IN is selected
SET (k
Ω
)
Open 100 66.5 49.9 43.2 31.6 22.1 13.7 for its ability to handle the large RMS current into the
VO
converter. For a buck converter, the switching duty-cycle
(V)
0.6 1.2 1.5 1.8 2 2.5 3.3 5 can be estimated as: Voltage margining is the dynamic adjustment of the output V voltage to its worst case operating range in production D = O testing to stress the load circuitry, verify control/protec- VIN tion functionality of the board and improve the system Without considering the inductor current ripple, the RMS reliability. Figure 2 shows how to implement margining current of the input capacitor can be estimated as: function with the LTM4600. In addition to the feedback resistor R I SET, several external components are added. I O(MAX) CIN(RMS) = • D •(1−D) Turn off both transistor QUP and QDOWN to disable the η% margining. When QUP is on and QDOWN is off, the output In the above equation, η% is the estimated efficiency of the power module. C1 can be a switcher-rated electrolytic VOUT aluminum capacitor, OS-CON capacitor or high volume LTM4600 ceramic capacitors. Note the capacitor ripple current RDOWN ratings are often based on only 2000 hours of life. This 100k makes it advisable to properly derate the input capacitor, QDOWN or choose a capacitor rated at a higher temperature than VOSET 2N7002 required. Always contact the capacitor manufacturer for PGND SGND RSET RUP derating requirements. In Figure 18, the input capacitors are used as high fre- QUP quency input decoupling capacitors. In a typical 10A 2N7002 output application, 1-2 pieces of very low ESR X5R or 4600 F02 X7R, 10µF ceramic capacitors are recommended. This
Figure 2. LTM4600 Margining Implementation
4600fd 10 For more information www.linear.com/LTM4600 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Application Package Description Revision History Typical Application Related Parts