Datasheet LTC4361-1, LTC4361-2 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Overvoltage/Overcurrent Protection Controller |
| 页数 / 页 | 16 / 7 — APPLICATIONS INFORMATION. Figure 1. Protection from Input Overvoltage and … |
| 修订版 | C |
| 文件格式/大小 | PDF / 628 Kb |
| 文件语言 | 英语 |
APPLICATIONS INFORMATION. Figure 1. Protection from Input Overvoltage and Overcurrent. Start-Up. Overvoltage. Overcurrent
该数据表的模型线
- LTC4361CDC-1#PBF LTC4361CDC-1#TRMPBF LTC4361CDC-1#TRPBF LTC4361CDC-2#PBF LTC4361CDC-2#TRMPBF LTC4361CDC-2#TRPBF LTC4361CTS8-1#PBF LTC4361CTS8-1#TRMPBF LTC4361CTS8-1#TRPBF LTC4361CTS8-2#PBF LTC4361CTS8-2#TRMPBF LTC4361CTS8-2#TRPBF LTC4361HDC-1#PBF LTC4361HDC-1#TRMPBF LTC4361HDC-1#TRPBF LTC4361HDC-2#PBF LTC4361HDC-2#TRMPBF LTC4361HDC-2#TRPBF LTC4361HTS8-1#PBF LTC4361HTS8-1#TRMPBF LTC4361HTS8-1#TRPBF LTC4361HTS8-2#PBF LTC4361HTS8-2#TRMPBF LTC4361HTS8-2#TRPBF LTC4361IDC-1#PBF LTC4361IDC-1#TRMPBF LTC4361IDC-1#TRPBF LTC4361IDC-2#PBF LTC4361IDC-2#TRMPBF LTC4361IDC-2#TRPBF LTC4361ITS8-1#PBF LTC4361ITS8-1#TRMPBF LTC4361ITS8-1#TRPBF LTC4361ITS8-2#PBF LTC4361ITS8-2#TRMPBF LTC4361ITS8-2#TRPBF
文件文字版本
link to page 7 LTC4361-1/LTC4361-2
APPLICATIONS INFORMATION
The typical LTC4361 application protects 2.5V to 5.5V The GATE ramp rate is limited to 3V/ms. VOUT follows at systems in portable devices from power supply overvolt- a similar rate which results in an inrush current into the age. The basic application circuit is shown in Figure 1. load capacitor COUT of: Device operation and external component selection is discussed in detail in the following sections. dV I GATE INRUSH = COUT • = COUT • 3 [mA/µF] dt R The servo loop is compensated by the parasitic capaci- SENSE M1 0.025Ω Si1470DH VOUT VIN tance of the external MOSFET. No further compensation 5V 5V COUT 1.5A components are normally required. In the case where the 10µF parasitic capacitance is less than 100pF, a 100pF com- GATE pensation capacitor between GATE and ground may be SENSE OUT required. LTC4361 IN An even slower GATE ramp and lower inrush current ON PWRGD can be achieved by connecting an external capacitor, CG, GND from GATE to ground. The voltage at GATE then ramps 436112 F01 up with a slope equal to 10µA/CG [V/s]. Choose CG using the formula:
Figure 1. Protection from Input Overvoltage and Overcurrent
10µA CG = • COUT IINRUSH
Start-Up
When VIN is less than the undervoltage lockout level of
Overvoltage
2.1V, the GATE driver is held low and the PWRGD pull- When power is first applied, VIN must remain below 5.7V down is high impedance. When VIN rises above 2.1V and (VIN(OV) – ∆VOV) for more than 130ms before GATE is ON is held low, a 130ms delay cycle starts. Any undervolt- ramped up to turn on the MOSFET. If VIN then rises above age or overvoltage event at IN (VIN < 2.1V or VIN > 5.7V) 5.8V (VIN(OV)), the overvoltage comparator activates the restarts the delay cycle. This delay allows the N-channel 30mA fast pull-down on GATE within 1µs. After an over- MOSFET to isolate the output from any input transients voltage condition, the MOSFET is held off until VIN once that occur at start-up. When the delay cycle completes, again remains below 5.7V for 130ms. GATE starts its slow ramp-up.
Overcurrent GATE Control
The overcurrent comparator protects the MOSFET from An internal charge pump provides a gate overdrive greater excessive current. It trips when the SENSE pin falls more than 3.5V when 2.5V ≤ VIN < 3V. If VIN ≥ 3V, the gate drive than 50mV below IN for 10µs. When the overcurrent com- is guaranteed to be greater than 4.5V. This allows the use parator trips, GATE is pulled low quickly and the PWRGD of logic-level N-channel MOSFETs. An internal 6V clamp pull-down releases. The LTC4361-2 automatically tries between GATE and OUT protects the MOSFET gate. Rev C For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
APPLICATIONS INFORMATION
The typical LTC4361 application protects 2.5V to 5.5V The GATE ramp rate is limited to 3V/ms. VOUT follows at systems in portable devices from power supply overvolt- a similar rate which results in an inrush current into the age. The basic application circuit is shown in Figure 1. load capacitor COUT of: Device operation and external component selection is discussed in detail in the following sections. dV I GATE INRUSH = COUT • = COUT • 3 [mA/µF] dt R The servo loop is compensated by the parasitic capaci- SENSE M1 0.025Ω Si1470DH VOUT VIN tance of the external MOSFET. No further compensation 5V 5V COUT 1.5A components are normally required. In the case where the 10µF parasitic capacitance is less than 100pF, a 100pF com- GATE pensation capacitor between GATE and ground may be SENSE OUT required. LTC4361 IN An even slower GATE ramp and lower inrush current ON PWRGD can be achieved by connecting an external capacitor, CG, GND from GATE to ground. The voltage at GATE then ramps 436112 F01 up with a slope equal to 10µA/CG [V/s]. Choose CG using the formula:
Figure 1. Protection from Input Overvoltage and Overcurrent
10µA CG = • COUT IINRUSH
Start-Up
When VIN is less than the undervoltage lockout level of
Overvoltage
2.1V, the GATE driver is held low and the PWRGD pull- When power is first applied, VIN must remain below 5.7V down is high impedance. When VIN rises above 2.1V and (VIN(OV) – ∆VOV) for more than 130ms before GATE is ON is held low, a 130ms delay cycle starts. Any undervolt- ramped up to turn on the MOSFET. If VIN then rises above age or overvoltage event at IN (VIN < 2.1V or VIN > 5.7V) 5.8V (VIN(OV)), the overvoltage comparator activates the restarts the delay cycle. This delay allows the N-channel 30mA fast pull-down on GATE within 1µs. After an over- MOSFET to isolate the output from any input transients voltage condition, the MOSFET is held off until VIN once that occur at start-up. When the delay cycle completes, again remains below 5.7V for 130ms. GATE starts its slow ramp-up.
Overcurrent GATE Control
The overcurrent comparator protects the MOSFET from An internal charge pump provides a gate overdrive greater excessive current. It trips when the SENSE pin falls more than 3.5V when 2.5V ≤ VIN < 3V. If VIN ≥ 3V, the gate drive than 50mV below IN for 10µs. When the overcurrent com- is guaranteed to be greater than 4.5V. This allows the use parator trips, GATE is pulled low quickly and the PWRGD of logic-level N-channel MOSFETs. An internal 6V clamp pull-down releases. The LTC4361-2 automatically tries between GATE and OUT protects the MOSFET gate. Rev C For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts