Datasheet ADP5090 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | Ultralow Power Boost Regulator with MPPT and Charge Management |
| 页数 / 页 | 21 / 8 — ADP5090. Data Sheet. +125°C +85°C. A) 7. +25°C. –40°C. n (. NT 6. CURRE … |
| 修订版 | C |
| 文件格式/大小 | PDF / 634 Kb |
| 文件语言 | 英语 |
ADP5090. Data Sheet. +125°C +85°C. A) 7. +25°C. –40°C. n (. NT 6. CURRE E. CURRE E 15. AKAG. +125°C. +85°C. L 10. BAT. BACK_UP. 2.0. 2.4. 2.8. 3.2. 3.6. 4.0. 4.4
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ADP5090 Data Sheet 30 8 +125°C +85°C A) 7 +25°C 25 n A) –40°C ( n ( NT 6 NT 20 5 CURRE E CURRE E 15 4 AKAG +125°C E AKAG L +85°C E 3 +25°C L 10 –40°C BAT 2 BACK_UP 5 1 0 0 2.0 2.4 2.8 3.2 3.6 4.0 4.4
109
4.8 5.2 2.0 2.4 2.8 3.2 3.6 4.0 4.4
112
4.8 5.2 BAT VOLTAGE (V) BACK_UP VOLTAGE (V)
12263- 12263- Figure 15. BAT Leakage Current vs. BAT Voltage Figure 18. BACK_UP Leakage Current vs. BACK_UP Voltage
VIN VIN 1 1 BAT SYS SYS BAT 2 SW 2 4 4
110
SW
114 12263- 12263-
CH1 1.00V B CH1 1.00V B M40.0ms A CH2 1.02V W CH2 1.00V BW M100ms A CH2 1.02V W CH2 1.00V BW CH3 1.00V B CH3 1.00V B W CH4 2.00V BW W CH4 2.00V
Figure 16. Startup with 100 μF Battery, VBAT > VBAT_SD Figure 19. Startup with Empty 100 μF Battery
VIN 1 VIN 1 BAT SYS BAT SYS 2 2 PGOOD 4 4
113 014
SW
12263- 12263-
CH1 1.00V B CH1 500mV B M200ms A CH4 920mV W CH2 1.00V BW M20.0ms A CH2 1.02V W CH2 1.00V BW CH3 1.00V B CH3 1.00V B W CH4 2.00V BW W CH4 2.00V BW
Figure 17. Startup with 100 μF Battery, VBAT < VBAT_SD Figure 20. PGOOD Function Waveform Rev. C | Page 8 of 21 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS DETAILED FUNCTIONAL BLOCK DIAGRAM THEORY OF OPERATION COLD STARTUP (VSYS < VSYS_TH, VIN > VIN_COLD) BOOST REGULATOR (VBAT_TERM > VSYS ≥ VSYS_TH) VIN OPEN CIRCUIT AND MPPT ENERGY STORAGE CHARGE MANAGEMENT BACKUP STORAGE PATH MINOP FUNCTION DISABLING BOOST BATTERY OVERCHARGING PROTECTION BATTERY DISCHARGING PROTECTION POWER GOOD (PGOOD) POWER PATH WORKING FLOW CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ENERGY HARVESTER SELECTION ENERGY STORAGE ELEMENT SELECTION INDUCTOR SELECTION CAPACITOR SELECTION Input Capacitor SYS Capacitor CBP Capacitor LAYOUT AND ASSEMBLY CONSIDERATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
109
4.8 5.2 2.0 2.4 2.8 3.2 3.6 4.0 4.4
112
4.8 5.2 BAT VOLTAGE (V) BACK_UP VOLTAGE (V)
12263- 12263- Figure 15. BAT Leakage Current vs. BAT Voltage Figure 18. BACK_UP Leakage Current vs. BACK_UP Voltage
VIN VIN 1 1 BAT SYS SYS BAT 2 SW 2 4 4
110
SW
114 12263- 12263-
CH1 1.00V B CH1 1.00V B M40.0ms A CH2 1.02V W CH2 1.00V BW M100ms A CH2 1.02V W CH2 1.00V BW CH3 1.00V B CH3 1.00V B W CH4 2.00V BW W CH4 2.00V
Figure 16. Startup with 100 μF Battery, VBAT > VBAT_SD Figure 19. Startup with Empty 100 μF Battery
VIN 1 VIN 1 BAT SYS BAT SYS 2 2 PGOOD 4 4
113 014
SW
12263- 12263-
CH1 1.00V B CH1 500mV B M200ms A CH4 920mV W CH2 1.00V BW M20.0ms A CH2 1.02V W CH2 1.00V BW CH3 1.00V B CH3 1.00V B W CH4 2.00V BW W CH4 2.00V BW
Figure 17. Startup with 100 μF Battery, VBAT < VBAT_SD Figure 20. PGOOD Function Waveform Rev. C | Page 8 of 21 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS DETAILED FUNCTIONAL BLOCK DIAGRAM THEORY OF OPERATION COLD STARTUP (VSYS < VSYS_TH, VIN > VIN_COLD) BOOST REGULATOR (VBAT_TERM > VSYS ≥ VSYS_TH) VIN OPEN CIRCUIT AND MPPT ENERGY STORAGE CHARGE MANAGEMENT BACKUP STORAGE PATH MINOP FUNCTION DISABLING BOOST BATTERY OVERCHARGING PROTECTION BATTERY DISCHARGING PROTECTION POWER GOOD (PGOOD) POWER PATH WORKING FLOW CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ENERGY HARVESTER SELECTION ENERGY STORAGE ELEMENT SELECTION INDUCTOR SELECTION CAPACITOR SELECTION Input Capacitor SYS Capacitor CBP Capacitor LAYOUT AND ASSEMBLY CONSIDERATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE