Datasheet LTC4012-3 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | High Efficiency, Multi-Chemistry Battery Charger with PowerPath Control |
| 页数 / 页 | 28 / 6 — (TA = 25°C unless otherwise noted. L = IHLP-2525 6.8µH). Charge Current … |
| 文件格式/大小 | PDF / 383 Kb |
| 文件语言 | 英语 |
(TA = 25°C unless otherwise noted. L = IHLP-2525 6.8µH). Charge Current Accuracy. Charge Current Line Regulation
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文件文字版本
LTC4012-3 Typical perForMance characTerisTics
(TA = 25°C unless otherwise noted. L = IHLP-2525 6.8µH) Charge Current Accuracy Charge Current Line Regulation
2 0.5 BAT = 6V 0.4 R 1 SENSE = 33mΩ 0.3 RIN = 3.01k 0 0.2 ICHG = 1A DCIN = 24V –1 R 0.1 PROG = 35.7k –2 DCIN = 12V 0 ICHG = 2A RPROG = 26.7k –0.1 –3 ICHG = 3A –0.2 –4 CHARGE CURRENT ERROR (%) CHARGE CURRENT ERROR (%) –0.3 –5 RSENSE = 33mΩ –0.4 RIN = 3.01k –6 –0.5 0 2 4 6 8 10 12 14 16 18 20 22 24 5 10 15 20 25 BAT (V) DCIN (V) 4012-3 G07 4012-3 G08
Charge Current Load Regulation Input Current Limit
3.5 3.0 ICHG = 3A 3.0 2.5 IIN 2.5 2.0 ICHG = 2A I 2.0 1.5 CHG 1.5 1.0 ICHG = 1A 1.0 CURRENT (A) 0.5 2.5A BULK CHARGE 2.1A INPUT CURRENT LIMIT CHARGE CURRENT (A) 0.5 0 DCIN = 20V 0 RSENSE = 33mΩ –0.5 ICL STATE RIN = 3.01k –0.5 –1.0 11.0 11.4 11.8 12.2 12.6 13.0 0 0.5 1.0 1.5 2.0 2.5 BAT (V) SYSTEM LOAD (A) 4012-3 G09 4012-3 G10
PWM Soft-Start Gate Drive Non-Overlap
ICHG 2A/DIV /DIV) BGATE ITH 1V/DIV PROG 1V/DIV TGATE SHDN EXTERNAL FET DRIVE (1V 5V/DIV TIME (500µs/DIV) 4012-3 G11 TIME (80ns/DIV) 4012-3 G12 40123fb Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuits Operation Applications Information Package Description Revision History Typical Application Related Parts
(TA = 25°C unless otherwise noted. L = IHLP-2525 6.8µH) Charge Current Accuracy Charge Current Line Regulation
2 0.5 BAT = 6V 0.4 R 1 SENSE = 33mΩ 0.3 RIN = 3.01k 0 0.2 ICHG = 1A DCIN = 24V –1 R 0.1 PROG = 35.7k –2 DCIN = 12V 0 ICHG = 2A RPROG = 26.7k –0.1 –3 ICHG = 3A –0.2 –4 CHARGE CURRENT ERROR (%) CHARGE CURRENT ERROR (%) –0.3 –5 RSENSE = 33mΩ –0.4 RIN = 3.01k –6 –0.5 0 2 4 6 8 10 12 14 16 18 20 22 24 5 10 15 20 25 BAT (V) DCIN (V) 4012-3 G07 4012-3 G08
Charge Current Load Regulation Input Current Limit
3.5 3.0 ICHG = 3A 3.0 2.5 IIN 2.5 2.0 ICHG = 2A I 2.0 1.5 CHG 1.5 1.0 ICHG = 1A 1.0 CURRENT (A) 0.5 2.5A BULK CHARGE 2.1A INPUT CURRENT LIMIT CHARGE CURRENT (A) 0.5 0 DCIN = 20V 0 RSENSE = 33mΩ –0.5 ICL STATE RIN = 3.01k –0.5 –1.0 11.0 11.4 11.8 12.2 12.6 13.0 0 0.5 1.0 1.5 2.0 2.5 BAT (V) SYSTEM LOAD (A) 4012-3 G09 4012-3 G10
PWM Soft-Start Gate Drive Non-Overlap
ICHG 2A/DIV /DIV) BGATE ITH 1V/DIV PROG 1V/DIV TGATE SHDN EXTERNAL FET DRIVE (1V 5V/DIV TIME (500µs/DIV) 4012-3 G11 TIME (80ns/DIV) 4012-3 G12 40123fb Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuits Operation Applications Information Package Description Revision History Typical Application Related Parts