Datasheet LTC4007 (Analog Devices) - 9

LTC4007
TEST CIRCUIT
LTC4007 CHEM 16 VREF + DIVIDER/ EA MUX 3C4C 7 – CSP BAT ITH 14 15 10 + LT1055 – 0.6V 4007 TC
OPERATION Overview
C/10 comparator will indicate this condition by latch- The LTC4007 is a synchronous current mode PWM step- ing the FLAG pin low. The charge timer is also reset to down (buck) switcher battery charger controller. The 1/4 of the total charge time when FLAG goes low. If this charge current is programmed by the combination of a condition is caused by an input current limit condition, program resistor (R described below, then the FLAG indicator will be inhibited. PROG) from the PROG pin to ground and a sense resistor (R When a time-out occurs, charging is terminated immedi- SENSE) between the CSP and BAT pins. The final float voltage is programmed to one of four ately and the CHG pin is forced to a high impedance state. values (12.3V, 12.6V, 16.4V, 16.8V) with ±1% maximum The charger will automatically restart if the cell voltage accuracy using pins 3C4C and CHEM. Charging begins is below 3.9V (or 3.81V if CHEM is low). To restart the when the potential at the DCIN pin rises above the voltage charge cycle manually, simply remove the input voltage at BAT (and the UVLO voltage) and the SHDN pin is low; and reapply it, or set the SHDN pin high momentarily. the CHG pin is set low. At the beginning of the charge cycle, When the input voltage is not present, the charger goes if the cell voltage is below 2.5V (2.44V if CHEM is low), the into a sleep mode, dropping battery current drain to 15µA. LOBAT pin will be low. The LOBAT indicator can be used This greatly reduces the current drain on the battery and to reduce the charging current to a low value, typically increases the standby time. The charger is inhibited any 10% of full scale. If the cell voltage stays below 2.5V for time the SHDN pin is high. 25% of the total charge time, the charge sequence will be
Input FET
terminated immediately and the FAULT pin will be set low. The input FET circuit performs two functions. It enables An external thermistor network is sampled at regular inter- the charger if the input voltage is higher than the CLN pin vals. If the thermistor value exceeds design limits, charging and provides the logic indicator of AC present on the ACP is suspended and the FAULT pin is set low. If the thermistor pin. It controls the gate of the input FET to keep a low value returns to an acceptable value, charging resumes forward voltage drop when charging and also prevents and the FAULT pin is set high. An external resistor on the RT reverse current flow through the input FET. pin sets the charge termination time. Charge termination can be defeated by forcing the CHG pin to a low voltage. If the input voltage is less than VCLN, it must go at least 170mV higher than V As the battery approaches the final float voltage, the CLN to activate the charger. When this occurs the ACP pin is released and pulled up with charge current will begin to decrease. When the current an external load to indicate that the adapter is present. drops to 10% of the full-scale charge current, an internal The gate of the input FET is driven to a voltage sufficient Rev D For more information www.analog.com 9 Document Outline Description Typical Application Absolute Maximum Ratings Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuit Operation Applications Information Package Description Revision History Typical Application Related Parts