Datasheet ADE9153A (Analog Devices) - 6

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ADE9153A Data Sheet Parameter Min Typ Max Unit Test Conditions/Comments
POWER SUPPLY For specified performance VDD Pin 2.97 3.63 V Minimum = 3.3 V − 10%; maximum = 3.3 V + 10% VDD Pin Current, IDD 9.3 12 mA Consumption in operation, without mSure running 8.5 μA When the ADE9153A is held in reset
AUTOCALIBRATION
VDD = 3.3 V, AGND = DGND = 0 V, on-chip reference, CLKIN = 12.288 MHz, TA = 25°C (typical), IMAX = 60 A rms, VNOM = 230 V, RSHUNT_PHASE = 200 μΩ, turns ratio on CTNEUTRAL = 2500:1, burden on CTNEUTRAL = 16.4 Ω, and CTNEUTRAL voltage potential divider of 1000:1 (990 kΩ and 1 kΩ resistors), unless otherwise noted. The values in Table 2 are specified for the system described; if the shunt or voltage potential divider is changed, the values in Table 2 change as well. For example, increasing the shunt value decreases the calibration time required for the phase current channel; conversely, decreasing the shunt value increases the calibration time.
Table 2. Parameter Min Typ Max Unit Test Conditions/Comments
AUTOCALIBRATION TA = 25°C ±5 °C Current Channel A (Phase Shunt) Calibration Time Turbo Mode For more information on the power modes and calibration times, see the mSure Autocalibration Feature section 0.353% Accuracy Target 16 sec 0.25% Accuracy Target 45 sec Normal Mode 0.353% Accuracy Target 40 sec 0.25% Accuracy Target 115 sec Current Consumption Additional consumption from 3.3 V supply Turbo Mode 16 mA rms With peak consumption of 33 mA Normal Mode 9.3 mA rms With peak consumption of 19 mA Current Channel (Neutral CT) Calibration Time For more information, see the mSure Autocalibration Feature section 0.5 % Accuracy Target, Turbo Mode 12 sec Normal Mode 20 sec Current Consumption Additional consumption from 3.3 V supply Turbo Mode 16 mA rms With peak consumption of 33 mA Normal Mode 9.3 mA rms With peak consumption of 19 mA Voltage Channel Calibration Time For more information, see the mSure Autocalibration Feature section 0.353% Accuracy Target 25 sec 0.25% Accuracy Target 85 sec Current Consumption <1 mA rms Additional consumption from 3.3 V supply Rev. 0 | Page 6 of 50 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATIONS CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AUTOCALIBRATION SPI TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ENERGY LINEARITY OVER SUPPLY AND TEMPERATURE ENERGY ERROR OVER FREQUENCY AND POWER FACTOR RMS LINEARITY OVER TEMPERATURE AND RMS ERROR OVER FREQUENCY SIGNAL-TO-NOISE RATIO (SNR) PERFORMANCE OVER DYNAMIC RANGE TEST CIRCUIT TERMINOLOGY THEORY OF OPERATION mSURE AUTOCALIBRATION FEATURE mSure System Warning Interrupts MEASUREMENTS Current Channel Current Channel Gain, xIGAIN High-Pass Filter Digital Integrator Phase Compensation Voltage Channel RMS and Power Measurements Total RMS Total Active Power Fundamental Reactive Power Total Apparent Power Energy Accumulation, Power Accumulation, and No Load Detection Features Energy Accumulation Energy Accumulation Modes Reset Energy Register on Read Power Accumulation No Load Detection Feature Digital to Frequency Conversion—CFx Output Calibration Frequency (CF) Energy Selection Configuring the CFx Pulse Width CFx Pulse Sign Clearing the CFx Accumulator POWER QUALITY MEASUREMENTS Zero-Crossing Detection CF1/ZX/DREADY Zero-Crossing Timeout Line Period Calculation Angle Measurement One Cycle RMS Measurement Dip and Swell Indication Overcurrent Indication Peak Detection Power Factor Temperature APPLICATIONS INFORMATION INTERRUPTS/EVENTS PIN INTERRUPTS SERVICING INTERRUPTS CF2/ZX/DREADY EVENT PIN ACCESSING ON-CHIP DATA SPI PROTOCOL OVERVIEW UART INTERFACE COMMUNICATION VERIFICATION REGISTERS CRC OF CONFIGURATION REGISTERS CONFIGURATION LOCK REGISTER INFORMATION REGISTER SUMMARY REGISTER DETAILS OUTLINE DIMENSIONS ORDERING GUIDE