Data SheetADE7953I2C Interface Timing VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 3.58 MHz, TMIN to TMAX = −40°C to +85°C, unless otherwise noted. Table 3.Standard ModeFast ModeParameter DescriptionMin1 Max1 Min1 Max1 Unit fSCL SCL clock frequency 0 100 0 400 kHz tHD;STA Hold time for a start or repeated start condition 4.0 0.6 μs tLOW Low period of SCL clock 4.7 1.3 μs tHIGH High period of SCL clock 4.0 0.6 μs tSU;STA Setup time for a repeated start condition 4.7 0.6 μs tHD;DAT Data hold time 0.1 3.45 0.1 0.9 μs tSU;DAT Data setup time 250 100 ns tR Rise time of SDA and SCL signals 1000 20 300 ns tF Fall time of SDA and SCL signals 300 20 300 ns tSU;STO Setup time for stop condition 4.0 0.6 μs tBUF Bus-free time between a stop and start condition 4.7 1.3 μs tSP Pulse width of suppressed spikes N/A 50 ns 1 Min and max values are typical minimum and maximum values. I2C Interface Timing DiagramSDAtttBUFFSU;DATtHD;STAttSPRtRtFtLOWSCLtHD;STAtHD;DATtttSU;STASU;STOHIGH 2 STARTREPEATED STARTSTOPSTART 00 0- CONDITIONCONDITIONCONDITION CONDITION 32 09 Figure 3. I2C Interface Timing Rev. C | Page 7 of 72 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS SPI Interface Timing SPI Interface Timing Diagram I2C Interface Timing I2C Interface Timing Diagram ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUIT TERMINOLOGY ADE7953 POWER-UP PROCEDURE REQUIRED REGISTER SETTING THEORY OF OPERATION ANALOG INPUTS Current Channel A Current Channel B Voltage Channel ANALOG-TO-DIGITAL CONVERSION Oversampling Noise Shaping Antialiasing Filter CURRENT CHANNEL ADCS di/dt Current Sensor and Digital Integrator VOLTAGE CHANNEL ADC REFERENCE CIRCUIT ROOT MEAN SQUARE MEASUREMENT CURRENT CHANNEL RMS CALCULATION VOLTAGE CHANNEL RMS CALCULATION ACTIVE POWER CALCULATION SIGN OF ACTIVE POWER CALCULATION ACTIVE ENERGY CALCULATION Active Energy Integration Time Under Steady Load Active Energy Line Cycle Accumulation Mode ACTIVE ENERGY ACCUMULATION MODES Signed Accumulation Mode Positive-Only Accumulation Mode Absolute Accumulation Mode REACTIVE POWER CALCULATION SIGN OF REACTIVE POWER CALCULATION REACTIVE ENERGY CALCULATION Reactive Energy Integration Time Under Steady Load Reactive Energy Line Cycle Accumulation Mode REACTIVE ENERGY ACCUMULATION MODES Signed Accumulation Mode Antitamper Accumulation Mode Absolute Accumulation Mode APPARENT POWER CALCULATION APPARENT ENERGY CALCULATION Apparent Energy Integration Time Under Steady Load Apparent Energy Line Cycle Accumulation Mode AMPERE-HOUR ACCUMULATION ENERGY-TO-FREQUENCY CONVERSION PULSE OUTPUT CHARACTERISTICS ENERGY CALIBRATION GAIN CALIBRATION Current Channel Gain Adjustment PHASE CALIBRATION OFFSET CALIBRATION Power Offsets RMS Offsets PERIOD MEASUREMENT INSTANTANEOUS POWERS AND WAVEFORM SAMPLING POWER FACTOR USING THE LINE CYCLE ACCUMULATION MODE TO DETERMINE THE POWER FACTOR POWER FACTOR WITH NO-LOAD DETECTION ANGLE MEASUREMENT NO-LOAD DETECTION SETTING THE NO-LOAD THRESHOLDS ACTIVE ENERGY NO-LOAD DETECTION Active Energy No-Load Interrupt Active Energy No-Load Status Bits REACTIVE ENERGY NO-LOAD DETECTION Reactive Energy No-Load Interrupt Reactive Energy No-Load Status Bits APPARENT ENERGY NO-LOAD DETECTION Apparent Energy No-Load Interrupt Apparent Energy No-Load Status Bits ZERO-CROSSING DETECTION ZERO-CROSSING OUTPUT PINS Voltage Channel Zero Crossing Current Channel Zero Crossing ZERO-CROSSING INTERRUPTS ZERO-CROSSING TIMEOUT ZERO-CROSSING THRESHOLD VOLTAGE SAG DETECTION SETTING THE SAGCYC REGISTER SETTING THE SAGLVL REGISTER VOLTAGE SAG INTERRUPT PEAK DETECTION INDICATION OF POWER DIRECTION REVERSE POWER SIGN INDICATION OVERCURRENT AND OVERVOLTAGE DETECTION SETTING THE OVLVL AND OILVL REGISTERS OVERVOLTAGE AND OVERCURRENT INTERRUPTS ALTERNATIVE OUTPUT FUNCTIONS ADE7953 INTERRUPTS PRIMARY INTERRUPTS (VOLTAGE CHANNEL AND CURRENT CHANNEL A) CURRENT CHANNEL B INTERRUPTS COMMUNICATING WITH THE ADE7953 COMMUNICATION AUTODETECTION LOCKING THE COMMUNICATION INTERFACE SPI INTERFACE I2C INTERFACE I2C Write Operations I2C Read Operations UART INTERFACE UART Read UART Write COMMUNICATION VERIFICATION AND SECURITY WRITE PROTECTION COMMUNICATION VERIFICATION CHECKSUM REGISTER ADE7953 REGISTERS ADE7953 REGISTER DESCRIPTIONS Interrupt Enable and Interrupt Status Registers Current Channel A and Voltage Channel Registers Current Channel B Registers LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE