Datasheet ADE7752, ADE7752A (Analog Devices) - 6

制造商Analog Devices
描述Polyphase Energy Metering IC with Pulse Output
页数 / 页24 / 6 — ADE7752/ADE7752A. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. 24 F1. …
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ADE7752/ADE7752A. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. 24 F1. DGND. 23 F2. VDD 3. 22 S1. REVP. 21 S0. ADE7752/. IAP. 20 CLKOUT

ADE7752/ADE7752A PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 24 F1 DGND 23 F2 VDD 3 22 S1 REVP 21 S0 ADE7752/ IAP 20 CLKOUT

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ADE7752/ADE7752A PIN CONFIGURATION AND FUNCTION DESCRIPTIONS CF 1 24 F1 DGND 2 23 F2 VDD 3 22 S1 REVP 4 21 S0 ADE7752/ IAP 5 20 CLKOUT ADE7752A IAN 6 19 CLKIN TOP VIEW 7 (Not to Scale) IBP 18 SCF IBN 8 17 ABS ICP 9 16 VAP ICN 10 15 VBP
03 -0
AGND 11 14 VCP
A 6-
REF
67
IN/OUT 12 13 VN
02 Figure 3. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 CF Calibration Frequency Logic Output. The CF logic output gives instantaneous real power information. This output is intended to be used for calibration purposes. See the SCF pin description. 2 DGND This provides the ground reference for the digital circuitry in the ADE7752: the multiplier, filters, and digital-to-frequency converter. Because the digital return currents in the ADE7752 are small, it is acceptable to connect this pin to the analog ground plane of the whole system. 3 VDD Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7752. The supply voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled to DGND with a 10 μF capacitor in parallel with a 100 nF ceramic capacitor. 4 REVP This logic output goes logic high when negative power is detected on any of the three phase inputs, that is, when the phase angle between the voltage and the current signals is greater than 90°. This output is not latched and is reset when positive power is once again detected. See the Negative Power Information section. 5, 6; IAP, IAN; Analog Inputs for Current Channel. This channel is intended for use with the current transducer and is 7, 8; IBP, IBN; referenced in this document as the current channel. These inputs are fully differential voltage inputs 9, 10 ICP, ICN with maximum differential input signal levels of ±0.5 V. See the Analog Inputs section. Both inputs have internal ESD protection circuitry. In addition, an overvoltage of ±6 V can be sustained on these inputs without risk of permanent damage. 11 AGND This pin provides the ground reference for the analog circuitry in the ADE7752: the ADCs, temperature sensor, and reference. This pin should be tied to the analog ground plane or the quietest ground reference in the system. This quiet ground reference should be used for all analog circuitry, such as antialiasing filters, current and voltage transducers, and so on. To keep ground noise around the ADE7752 to a minimum, the quiet ground plane should connect to the digital ground plane at only one point. It is acceptable to place the entire device on the analog ground plane. 12 REFIN/OUT This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 2.4 V ± 8% and a typical temperature coefficient of 20 ppm/°C. An external reference source may also be connected at this pin. In either case, this pin should be decoupled to AGND with a 1 μF ceramic capacitor. 13–16 VN, VCP, VBP, Analog Inputs for the Voltage Channel. This channel is intended for use with the voltage transducer and VAP is referenced in this document as the voltage channel. These inputs are single-ended voltage inputs with a maximum signal level of ±0.5 V with respect to VN for specified operation. All inputs have internal ESD protection circuitry. In addition, an overvoltage of ± 6 V can be sustained on these inputs without risk of permanent damage. 17 ABS This logic input is used to select the way the three active energies from the three phases are summed. This offers the designer the capability to do the arithmetical sum of the three energies (ABS logic high) or the sum of the absolute values (ABS logic low). See the Mode Selection of the Sum of the Three Active Energies section. 18 SCF Select Calibration Frequency. This logic input is used to select the frequency on the calibration output CF. Table 7 shows how the calibration frequencies are selected. Rev. C | Page 6 of 24 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUIT TERMINOLOGY THEORY OF OPERATION POWER FACTOR CONSIDERATIONS NONSINUSOIDAL VOLTAGE AND CURRENT ANALOG INPUTS CURRENT CHANNELS VOLTAGE CHANNELS TYPICAL CONNECTION DIAGRAMS CURRENT CHANNEL CONNECTION VOLTAGE CHANNELS CONNECTION METER CONNECTIONS POWER SUPPLY MONITOR HPF AND OFFSET EFFECTS DIGITAL-TO-FREQUENCY CONVERSION MODE SELECTION OF THE SUM OF THE THREE ACTIVE ENERGIES POWER MEASUREMENT CONSIDERATIONS TRANSFER FUNCTION FREQUENCY OUTPUTS F1 AND F2 FREQUENCY OUTPUT CF SELECTING A FREQUENCY FOR AN ENERGY METER APPLICATION FREQUENCY OUTPUTS NO LOAD THRESHOLD NEGATIVE POWER INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE