Datasheet ADE7753 (Analog Devices) - 8

制造商Analog Devices
描述Single-Phase Multifunction Metering IC with di/dt Sensor Interface
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ADE7753. TERMINOLOGY Measurement Error. ADC Offset Error. Phase Error between Channels. Gain Error. Power Supply Rejection

ADE7753 TERMINOLOGY Measurement Error ADC Offset Error Phase Error between Channels Gain Error Power Supply Rejection

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ADE7753 TERMINOLOGY Measurement Error
For the dc PSR measurement, a reading at nominal supplies The error associated with the energy measurement made by the (5 V) is taken. A second reading is obtained with the same input ADE7753 is defined by the following formula: signal levels when the supplies are varied ±5%. Any error Percentage Error = introduced is again expressed as a percentage of the reading. ⎛ Energy Register ADE7753 −True Energy ⎞
ADC Offset Error
⎜ ⎟×100% ⎜ ⎟ The dc offset associated with the analog inputs to the ADCs. It ⎝ True Energy ⎠ means that with the analog inputs connected to AGND, the
Phase Error between Channels
ADCs still see a dc analog input signal. The magnitude of the The digital integrator and the high-pass filter (HPF) in Channel 1 offset depends on the gain and input range selection—see the have a non-ideal phase response. To offset this phase response Typical Performance Characteristics section. However, when and equalize the phase response between channels, two phase- HPF1 is switched on, the offset is removed from Channel 1 correction networks are placed in Channel 1: one for the digital (current) and the power calculation is not affected by this offset. integrator and the other for the HPF. The phase correction The offsets can be removed by performing an offset networks correct the phase response of the corresponding calibration—see the Analog Inputs section. component and ensure a phase match between Channel 1
Gain Error
(current) and Channel 2 (voltage) to within ±0.1° over a range The difference between the measured ADC output code (minus of 45 Hz to 65 Hz with the digital integrator off. With the digital the offset) and the ideal output code—see the Channel 1 ADC integrator on, the phase is corrected to within ±0.4° and Channel 2 ADC sections. It is measured for each of the over a range of 45 Hz to 65 Hz. input ranges on Channel 1 (0.5 V, 0.25 V, and 0.125 V). The
Power Supply Rejection
difference is expressed as a percentage of the ideal code. This quantifies the ADE7753 measurement error as a percentage of reading when the power supplies are varied. For the ac PSR measurement, a reading at nominal supplies (5 V) is taken. A second reading is obtained with the same input signal levels when an ac (175 mV rms/120 Hz) signal is introduced onto the supplies. Any error introduced by this ac signal is expressed as a percentage of reading—see the Measurement Error definition. Rev. C | Page 8 of 60 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TERMINOLOGY PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUTS di/dt CURRENT SENSOR AND DIGITAL INTEGRATOR ZERO-CROSSING DETECTION Zero-Crossing Timeout PERIOD MEASUREMENT POWER SUPPLY MONITOR LINE VOLTAGE SAG DETECTION Sag Level Set PEAK DETECTION Peak Level Set Peak Level Record ADE7753 INTERRUPTS Using the ADE7753 Interrupts with an MCU Interrupt Timing TEMPERATURE MEASUREMENT ADE7753 ANALOG-TO-DIGITAL CONVERSION Antialias Filter ADC Transfer Function ADE7753 Reference Circuit CHANNEL 1 ADC Channel 1 Sampling Channel 1 RMS Calculation Channel 1 RMS Offset Compensation CHANNEL 2 ADC Channel 2 Sampling Channel 2 RMS Calculation Channel 2 RMS Offset Compensation PHASE COMPENSATION ACTIVE POWER CALCULATION ENERGY CALCULATION Integration Time under Steady Load POWER OFFSET CALIBRATION ENERGY-TO-FREQUENCY CONVERSION LINE CYCLE ENERGY ACCUMULATION MODE POSITIVE-ONLY ACCUMULATION MODE NO-LOAD THRESHOLD REACTIVE POWER CALCULATION SIGN OF REACTIVE POWER CALCULATION APPARENT POWER CALCULATION Apparent Power Offset Calibration APPARENT ENERGY CALCULATION Integration Times under Steady Load LINE APPARENT ENERGY ACCUMULATION ENERGIES SCALING CALIBRATING AN ENERGY METER BASED ON THE ADE7753 Watt Gain Calibrating Watt Gain Using a Reference Meter Example Calibrating Watt Gain Using an Accurate Source Example Watt Offset Calibrating Watt Offset Using a Reference Meter Example Calibrating Watt Offset with an Accurate Source Example Phase Calibration Calibrating Phase Using a Reference Meter Example Calibrating Phase with an Accurate Source Example VRMS and IRMS Calibration Apparent Energy Reactive Energy CLKIN FREQUENCY SUSPENDING ADE7753 FUNCTIONALITY CHECKSUM REGISTER ADE7753 SERIAL INTERFACE ADE7753 Serial Write Operation ADE7753 Serial Read Operation ADE7753 REGISTERS ADE7753 REGISTER DESCRIPTIONS COMMUNICATIONS REGISTER MODE REGISTER (0x09) INTERRUPT STATUS REGISTER (0x0B), RESET INTERRUPT STATUS REGISTER (0x0C), INTERRUPT ENABLE REGISTER (0x0A) CH1OS REGISTER (0x0D) OUTLINE DIMENSIONS ORDERING GUIDE