Datasheet LTC2051, LTC2052 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | Dual/Quad Zero-Drift Operational Amplifiers |
| 页数 / 页 | 12 / 9 — TYPICAL APPLICATIO. Obtaining Ultralow VOS Drift and Low Noise. eIN (DC – … |
| 文件格式/大小 | PDF / 148 Kb |
| 文件语言 | 英语 |
TYPICAL APPLICATIO. Obtaining Ultralow VOS Drift and Low Noise. eIN (DC – 1Hz). eIN (DC – 10Hz). PACKAGE DESCRIPTIO. DD Package
该数据表的模型线
- LTC2051CDD#PBF LTC2051CDD#TRPBF LTC2051CMS10#PBF LTC2051CMS10#TRPBF LTC2051CMS8#PBF LTC2051CMS8#TRPBF LTC2051CS8#PBF LTC2051CS8#TRPBF LTC2051HMS8#PBF LTC2051HMS8#TRPBF LTC2051HS8#PBF LTC2051HS8#TRPBF LTC2051HVCDD#PBF LTC2051HVCDD#TRPBF LTC2051HVCMS10#PBF LTC2051HVCMS10#TRPBF LTC2051HVCMS8#PBF LTC2051HVCMS8#TRPBF LTC2051HVCS8#PBF LTC2051HVCS8#TRPBF LTC2051HVHMS8#PBF LTC2051HVHMS8#TRPBF LTC2051HVHS8#PBF LTC2051HVHS8#TRPBF LTC2051HVIDD#PBF LTC2051HVIDD#TRPBF LTC2051HVIMS10#PBF LTC2051HVIMS10#TRPBF LTC2051HVIMS8#PBF LTC2051HVIMS8#TRPBF LTC2051HVIS8#PBF LTC2051HVIS8#TRPBF LTC2051IDD#PBF LTC2051IDD#TRPBF LTC2051IMS10#PBF LTC2051IMS10#TRPBF LTC2051IMS8#PBF LTC2051IMS8#TRPBF LTC2051IS8#PBF LTC2051IS8#TRPBF
- LTC2052CGN#PBF LTC2052CGN#TRPBF LTC2052CS#PBF LTC2052CS#TRPBF LTC2052HGN#PBF LTC2052HGN#TRPBF LTC2052HS#PBF LTC2052HS#TRPBF LTC2052HVCGN#PBF LTC2052HVCGN#TRPBF LTC2052HVCS#PBF LTC2052HVCS#TRPBF LTC2052HVHGN#PBF LTC2052HVHGN#TRPBF LTC2052HVHS#PBF LTC2052HVHS#TRPBF LTC2052HVIGN#PBF LTC2052HVIGN#TRPBF LTC2052HVIS#PBF LTC2052HVIS#TRPBF LTC2052IGN#PBF LTC2052IGN#TRPBF LTC2052IS#PBF LTC2052IS#TRPBF
文件文字版本
LTC2051/LTC2052
U TYPICAL APPLICATIO Obtaining Ultralow VOS Drift and Low Noise
+ 5 + 2 7 – 1/2 LTC2051 R4 1 6 1/2 LTC2051 – 3 + 5V C1 R5 OUT 20512 F01 C2 R1 R2 R3 1 3 + 8 6 A1 OUT 2 – –
A1 R1 R2 R3 R4 R5 C1 C2 eIN (DC – 1Hz) eIN (DC – 10Hz)
LT1677 2.49k 3.01k 340k 10k 100k 0.01μF 0.001μF 0.15μVP-P 0.2μVP-P LT1012 750Ω 57Ω 250k 10k 100k 0.01μF 0.001μF 0.3μVP-P 0.4μVP-P
U PACKAGE DESCRIPTIO DD Package 8-Lead Plastic DFN (3mm
×
3mm)
(Reference LTC DWG # 05-08-1698) R = 0.115 0.38 ± 0.10 TYP 5 8 0.675 ±0.05 3.00 ±0.10 1.65 ± 0.10 3.5 ±0.05 1.65 ±0.05 (4 SIDES) (2 SIDES) 2.15 ±0.05 (2 SIDES) PIN 1 TOP MARK PACKAGE (NOTE 6) OUTLINE 4 1 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.25 ± 0.05 0.50 BSC 0.50 2.38 ±0.10 BSC (2 SIDES) 0.00 – 0.05 2.38 ±0.05 BOTTOM VIEW—EXPOSED PAD (2 SIDES) NOTE: RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) (DD) DFN 1203 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 20512fd 9
U TYPICAL APPLICATIO Obtaining Ultralow VOS Drift and Low Noise
+ 5 + 2 7 – 1/2 LTC2051 R4 1 6 1/2 LTC2051 – 3 + 5V C1 R5 OUT 20512 F01 C2 R1 R2 R3 1 3 + 8 6 A1 OUT 2 – –
A1 R1 R2 R3 R4 R5 C1 C2 eIN (DC – 1Hz) eIN (DC – 10Hz)
LT1677 2.49k 3.01k 340k 10k 100k 0.01μF 0.001μF 0.15μVP-P 0.2μVP-P LT1012 750Ω 57Ω 250k 10k 100k 0.01μF 0.001μF 0.3μVP-P 0.4μVP-P
U PACKAGE DESCRIPTIO DD Package 8-Lead Plastic DFN (3mm
×
3mm)
(Reference LTC DWG # 05-08-1698) R = 0.115 0.38 ± 0.10 TYP 5 8 0.675 ±0.05 3.00 ±0.10 1.65 ± 0.10 3.5 ±0.05 1.65 ±0.05 (4 SIDES) (2 SIDES) 2.15 ±0.05 (2 SIDES) PIN 1 TOP MARK PACKAGE (NOTE 6) OUTLINE 4 1 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.25 ± 0.05 0.50 BSC 0.50 2.38 ±0.10 BSC (2 SIDES) 0.00 – 0.05 2.38 ±0.05 BOTTOM VIEW—EXPOSED PAD (2 SIDES) NOTE: RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) (DD) DFN 1203 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 20512fd 9