Datasheet LT1884, LT1885 (Analog Devices) - 9

LT1884/LT1885
U U W U APPLICATIO S I FOR ATIO
The LT1884/LT1885 dual op amp features exceptional interconnect, with the guard driven to the same common input precision with rail-to-rail output swing. Slew rate mode voltage as the amplifier inputs. and small-signal bandwidth are superior to other amplifi- ers with comparable input precision. These characteris-
Input Common Mode Range
tics make the LT1884/LT1885 a convenient choice for The LT1884/LT1885 output is able to swing close to each precision low voltage systems and for improved AC per- power supply rail, but the input stage is limited to operat- formance in higher voltage precision systems. Maintain- ing between VEE + 0.8V and VCC – 0.9V. Exceeding this ing the advantage of the precision inherent in the amplifier common mode range will cause the gain to drop to zero; depends upon proper applications circuit design and however, no gain reversal will occur. board layout.
Input Protection Preserving Input Precision
The inverting and noninverting input pins of the LT1884/ Preserving the input voltage accuracy of the LT1884/ LT1885 have limited on-chip protection. ESD protection is LT1885 requires that the applications circuit and PC board provided to prevent damage during handling. The input layout do not introduce errors comparable to or greater transistors have voltage clamping and limiting resistors to than the 30µV offset. Temperature differentials across the protect against input differentials up to 10V. Short tran- input connections can generate thermocouple voltages of sients above this level will also be tolerated. If the input 10s of microvolts. PC board layouts should keep connec- pins may be subject to a sustained differential voltage tions to the amplifier’s input pins close together and away above 10V, external limiting resistors should be used to from heat dissipating components. Air currents across the prevent damage to the amplifier. A 1k resistor in each input board can also generate temperature differentials. lead will provide protection against a 30V differential The extremely low input bias currents, 100pA, allow high voltage. accuracy to be maintained with high impedance sources and feedback networks. The LT1884/LT1885’s low input
Capacitive Loads
bias currents are obtained by using a cancellation circuit The LT1884/LT1885 can drive capacitive loads up to on-chip. This causes the resulting I + – BIAS and IBIAS to be 300pF when configured for unity gain. The capacitive load uncorrelated, as implied by the IOS specification being driving capability increases as the amplifier is used in comparable to the IBIAS. The user should not try to balance higher gain configurations. Capacitive load driving may the input resistances in each input lead, as is commonly also be increased by decoupling the capacitance from the recommended with most amplifiers. The impedance at output with a small resistance. either input should be kept as small as possible to mini- mize total circuit error.
Input Bias Currents
PC board layout is important to ensure that leakage While it may be tempting to seek out a JFET amplifier for currents do not corrupt the low IBIAS of the amplifier. In low input bias current, remember that bipolar devices high precision, high impedance circuits, the input pins improve with temperature while JFETs degrade. should be surrounded by a guard ring of PC board 9