LTC3639 OPERATION (Refer to Block Diagram) The LTC3639 is a synchronous step-down DC/DC regulator External feedback resistors (adjustable mode) can be used with internal power switches that uses Burst Mode con- by connecting both VPRG1 and VPRG2 to ground. trol, combining low quiescent current with high switching In adjustable mode the feedback comparator monitors frequency, which results in high efficiency across a wide the voltage on the V range of load currents. Burst Mode operation functions by FB pin and compares it to an internal 800mV reference. If this voltage is greater than the refer- using short “burst” cycles to switch the inductor current ence, the comparator activates a sleep mode in which the through the internal power MOSFETs, followed by a sleep power switches and current comparators are disabled, cycle where the power switches are off and the load cur- reducing the V rent is supplied by the output capacitor. During the sleep IN pin supply current to only 12µA. As the load current discharges the output capacitor, the voltage cycle, the LTC3639 draws only 12µA of supply current. on the V At light loads, the burst cycles are a small percentage of FB pin decreases. When this voltage falls 5mV below the 800mV reference, the feedback comparator the total cycle time which minimizes the average supply trips and enables burst cycles. current, greatly improving efficiency. Figure 1 shows an example of Burst Mode operation. The switching frequency At the beginning of the burst cycle, the internal high side is dependent on the inductor value, peak current, input power switch (P-channel MOSFET) is turned on and the voltage and output voltage. inductor current begins to ramp up. The inductor current increases until either the current exceeds the peak cur- SLEEP rent comparator threshold or the voltage on the VFB pin CYCLE SWITCHING BURST FREQUENCY exceeds 800mV, at which time the high side power switch CYCLE is turned off and the low side power switch (N-channel MOSFET) turns on. The inductor current ramps down until INDUCTOR CURRENT the reverse current comparator trips, signaling that the current is close to zero. If the voltage on the VFB pin is BURST FREQUENCY still less than the 800mV reference, the high side power switch is turned on again and another cycle commences. The average current during a burst cycle will normally be OUTPUT VOLTAGE greater than the average load current. For this architecture, ∆VOUT 3639 F01 the maximum average output current is equal to half of the peak current. Figure 1. Burst Mode Operation The hysteretic nature of this control architecture results in a switching frequency that is a function of the input Main Control Loop voltage, output voltage, and inductor value. This behavior The LTC3639 uses the V provides inherent short-circuit protection. If the output is PRG1 and VPRG2 control pins to connect internal feedback resistors to the V shorted to ground, the inductor current will decay very FB pin. This enables fixed outputs of 1.8V, 3.3V or 5V without increas- slowly during a single switching cycle. Since the high side ing component count, input supply current or exposure to switch turns on only when the inductor current is near noise on the sensitive input to the feedback comparator. zero, the LTC3639 inherently switches at a lower frequency during start-up or short-circuit conditions. 3639fc 8 For more information www.linear.com/LTC3639 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts