Datasheet LTC3864 (Analog Devices) - 3

制造商Analog Devices
描述60V Low IQ Step-Down DC/DC Controller with 100% Duty Cycle Capability
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elecTrical characTerisTics. The. denotes the specifications which apply over the specified operating

elecTrical characTerisTics The denotes the specifications which apply over the specified operating

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LTC3864
elecTrical characTerisTics The
l
denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Notes 3, 4) VIN = 12V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input Supply
VIN Input Voltage Operating Range 3.5 60 V VUVLO Undervoltage Lockout (VIN-VCAP) Ramping Up Threshold l 3.25 3.50 3.8 V (VIN-VCAP) Ramping Down Threshold l 3.00 3.25 3.50 V Hysteresis 0.25 V IQ Input DC Supply Current Pulse-Skipping Mode PLLIN/MODE = 0V, FREQ = 0V, 0.77 1.2 mA VFB = 0.83V (No Load) Burst Mode Operation PLLIN/MODE = Open, FREQ = 0V, 40 60 µA VFB = 0.83V (No Load) Shutdown Supply Current RUN = 0V 7 12 µA
Output Sensing
VREG Regulated Feedback Voltage VITH = 1.2V (Note 5) l 0.792 0.800 0.809 V ∆VREG Feedback Voltage Line Regulation VIN = 3.8V to 60V (Note 5) –0.005 0.005 %/V ∆VIN ∆VREG Feedback Voltage Load Regulation VITH = 0.6V to 1.8V (Note 5) –0.1 –0.015 0.1 % ∆VITH gm(EA) Error Amplifier Transconductance VITH = 1.2V, ∆IITH = ±5µA (Note 5) 1.8 mS IFB Feedback Input Bias Current –50 –10 50 nA
Current Sensing
VILIM Current Limit Threshold (VIN-VSENSE) VFB = 0.77V l 85 95 103 mV ISENSE SENSE Pin Input Current VSENSE = VIN 0.1 2 µA
Start-Up and Shutdown
VRUN RUN Pin Enable Threshold VRUN Rising l 1.22 1.26 1.32 V VRUNHYS RUN Pin Hysteresis 150 mV ISS Soft-Start Pin Charging Current VSS = 0V 10 µA
Switching Frequency and Clock Synchronization
f Programmable Switching Frequency RFREQ = 24.9kΩ 105 kHz RFREQ = 64.9kΩ 375 440 505 kHz RFREQ = 105kΩ 810 kHz fLO Low Switching Frequency FREQ = 0V 320 350 380 kHz fHI High Switching Frequency FREQ = Open 485 535 585 kHz fSYNC Synchronization Frequency l 75 750 kHz VCLK(IH) Clock Input High Level into PLLIN/MODE l 2 V VCLK(LO) Clock Input Low Level into PLLIN/MODE l 0.5 V fFOLD Foldback Frequency as Percentage of VFB = 0V, FREQ = 0V 18 % Programmable Frequency tON(MIN) Minimum On-Time 220 ns
Gate Driver
VCAP Gate Bias LDO Output Voltage (VIN-VCAP) IGATE = 0mA l 7.6 8.0 8.5 V VCAPDROP Gate Bias LDO Dropout Voltage VIN = 5V, IGATE = 15mA 0.2 0.5 V ∆VCAP(LINE) Gate Bias LDO Line Regulation 9V ≤ VIN ≤ 60V, IGATE = 0mA 0.002 0.03 %/V ∆VCAP(LOAD) Gate Bias LDO Load Regulation Load = 0mA to 20mA –3.5 % 3864fa For more information www.linear.com/LTC3864 3 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts