Datasheet LTC3864 (Analog Devices) - 8

LTC3864
pin FuncTions PLLIN/MODE (Pin 1):
External Reference Clock Input point. The voltage ranges from 0V to 2.9V, with 0.8V cor- and Burst Mode Enable/Disable. When an external clock responding to zero sense voltage (zero current). is applied to this pin, the internal phase-locked loop will
PGOOD (Pin 7):
Power Good Indicator Output. This open synchronize the turn-on edge of the gate drive signal with drain logic output is pulled to ground when the output the rising edge of the external clock. When no external voltage is outside of a ±10% window around the regulation clock is applied, this input determines the operation during light loading. Floating this pin selects low I point. The PGOOD switches states only after a 100µs delay. Q (40μA) Burst Mode operation. Pulling to ground selects pulse-skipping
RUN (Pin 8):
Digital Run Control Input. A RUN voltage mode operation. above the 1.26V threshold enables normal operation, while
FREQ (Pin 2):
Switching Frequency Set Point Input. The a voltage below the threshold shuts down the controller. switching frequency is programmed by an external set- An internal 0.4µA current source pulls the RUN pin up to point resistor R about 3.3V. The RUN pin can be connected to an external FREQ connected between the FREQ pin and signal ground. An internal 20µA current source creates power supply up to 60V. a voltage across the external setpoint resistor to set the
CAP (Pin 9):
Gate Driver (–) Supply. A low ESR ceramic internal oscillator frequency. Alternatively, this pin can bypass capacitor of at least 0.47µF or 10X the effective be driven directly by a DC voltage to set the oscillator CMILLER of the P-channel power MOSFET, is required from frequency. Grounding selects a fixed operating frequency VIN to this pin to serve as a bypass capacitor for the in- of 350kHz. Floating selects a fixed operating frequency ternal regulator. To insure stable low noise operation, the of 535kHz. bypass capacitor should be placed adjacent to the VIN and
SGND (Pin 3):
Ground Reference for Small Signal Analog CAP pins and connected using the same PCB metal layer. Component (Signal Ground). Signal ground should be used
SENSE (Pin 10):
Current Sense Input. A sense resistor as the common ground for all small signal analog inputs RSENSE from VIN pin to the SENSE pin sets the maximum and compensation components. Connect signal ground to current limit. The peak inductor current limit is equal to power ground (ground reference for power components) 95mV/RSENSE. For accuracy, it is important that the VIN only at one point using a single PCB trace. pin and the SENSE pin route directly to the current sense
SS (Pin 4):
Soft-Start and External Tracking Input. The resistor and make a Kelvin (4-wire) connection. LTC3864 regulates the feedback voltage to the smaller of
VIN (Pin 11):
Chip Power Supply. A minimum bypass 0.8V or the voltage on the SS pin. An internal 10μA pull-up capacitor of 0.1µF is required from the VIN pin to power current source is connected to this pin. A capacitor to ground. For best performance use a low ESR ceramic ground at this pin sets the ramp time to the final regulated capacitor placed near the VIN pin. output voltage. Alternatively, another voltage supply con- nected through a resistor divider to this pin allows the
GATE (Pin 12):
Gate Drive Output for External P-Channel output to track the other supply during start-up. MOSFET. The gate driver bias supply voltage (VIN-VCAP) is regulated to 8V when VIN is greater than 8V. The gate
VFB (Pin 5):
Output Feedback Sense. A resistor divider driver is disabled when (VIN-VCAP) is less than 3.5V (typi- from the regulated output point to this pin sets the output cal), 3.8V maximum in startup and 3.25V (typical) 3.5V voltage. The LTC3864 will nominally regulate VFB to the maximum in normal operation. internal reference value of 0.8V. If VFB is less than 0.4V, the switching frequency will linearly decrease and fold back
PGND (Exposed Pad Pin 13):
Ground Reference for Power to about one-fifth of the internal oscillator frequency to Components (Power Ground). The PGND exposed pad must reduce the minimum duty cycle. be soldered to the circuit board for electrical contact and for rated thermal performance of the package. Connect
ITH (Pin 6):
Current Control Threshold and Controller signal ground to power ground only at one point using a Compensation Point. This pin is the output of the error single PCB trace. amplifier and the switching regulator’s compensation 3864fa 8 For more information www.linear.com/LTC3864 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts