Datasheet LT3975 (Analog Devices) - 8

制造商Analog Devices
描述42V, 2.5A, 2MHz Step-Down Switching Regulator with 2.7µA Quiescent Current
页数 / 页24 / 8 — TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. …
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TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. Load Transient: 0.5A to 2.5A

TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted Load Transient: 0.5A to 2.5A

该数据表的模型线

文件文字版本

LT3975
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. Load Transient: 0.5A to 2.5A Load Transient: 20mA to 2A
IL IL 1A/DIV 1A/DIV VOUT VOUT 200mV/DIV 200mV/DIV 12V 3975 G37 IN 20µs/DIV 20µs/DIV 3975 G38 12VIN 3.3VOUT 3.3VOUT COUT = 47µF COUT = 47µF
PIN FUNCTIONS FB (Pin 1):
The LT3975 regulates the FB pin to 1.197V.
VIN (Pins 10, 11, 12):
The VIN pin supplies current to the Connect the feedback resistor divider tap to this pin. Also, LT3975’s internal circuitry and to the internal power switch. connect a phase lead capacitor between FB and the output. These pins must be locally bypassed. Typically, this capacitor is 10pF.
EN (Pin 13):
The part is in shutdown when this pin is low
SS (Pin 2):
A capacitor is tied between SS and ground to and active when this pin is high. The hysteretic threshold slowly ramp up the peak current limit of the LT3975 on voltage is 1.08V going up and 1.02V going down. The start-up. There is an internal 1.8μA pull-up on this pin. EN threshold is only accurate when VIN is above 4.3V. If The soft-start capacitor is actively discharged when the VIN is lower than 3.9V, internal UVLO will place the part EN pin goes low, during undervoltage lockout or thermal in shutdown. Tie to VIN if shutdown feature is not used. shutdown. Float this pin to disable soft-start.
RT (Pin 14):
A resistor is tied between RT and ground to
OUT (Pin 3):
This pin is an input to the dropout comparator set the switching frequency. which maintains a minimum dropout of 500mV between
PG (Pin 15):
The PG pin is the open-drain output of an VIN and OUT. The OUT pin connects to the anode of the internal comparator. PGOOD remains low until the FB pin internal boost diode. This pin also supplies the current to is within 8.4% of the final regulation voltage. PGOOD is the LT3975’s internal regulator when OUT is above 3.2V. valid when V Connect this pin to the output when the programmed IN is above 2V. output voltage is less than 16V.
SYNC (Pin 16):
This is the external clock synchronization input. Ground this pin for low ripple Burst Mode operation
BOOST (Pin 4):
This pin is used to provide a drive volt- at low output loads. Tie to a clock source for synchroni- age, higher than the input voltage, to the internal bipolar zation, which will include pulse skipping at low output NPN power switch. loads. When in pulse-skipping mode, quiescent current
SW (Pins 5, 6, 7):
The SW pin is the output of an internal increases to 11µA in a typical application at no load. Do power switch. Connect these pins to the inductor, catch not float this pin. diode, and boost capacitor.
GND (Exposed Pad Pin 17):
Ground. The exposed pad
NC (Pins 8, 9):
No Connects. These pins are not connected must be soldered to the PCB. to internal circuitry. 3975f 8 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS