Datasheet LT3992 (Analog Devices) - 4

制造商Analog Devices
描述Monolithic Dual Tracking 3A Step-Down Switching Regulator
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elecTrical characTerisTics. The. denotes the specifications which apply over the full operating

elecTrical characTerisTics The denotes the specifications which apply over the full operating

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LT3992
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VVIN1/2 = 15V unless otherwise specified. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS
CH1 DIV 4 Threshold RRT/SYNC = 0V 0.89 1.0 1.06 V CH1 DIV 8 Threshold RRT/SYNC = 0V 1.39 1.5 1.56 V CLKOUT VOL 0.25 V CLKOUT VOH 2 V CLKOUT to SW1ON Delay ( tDCLKOSW1) CLKOUT Rising 60 ns CLKOUT to SW2ON Delay ( tDCLKOSW2) CLKOUT Falling 30 ns RT/SYNC to CLKOUT Delay ( tDRTSYNCH) VRT/SYNC = 0V to 2V Rising Edge 300 ns RT/SYNC to CLKOUT Delay ( tDRTSYNCL) VRT/SYNC = 2V to 0V Falling Edge 150 ns SYNC Frequency Range 250 2000 kHz SYNC Phase Angle CH1 to CH2 SYNC Frequency = 250kHz 180 Deg Minimum Switch On-Time CH1/2 160 ns Minimum Switch Off-Time CH1/2 200 ns Minimum Boost for 100% DC CH1/2 (Note 7) 1.6 2.2 2.6 V IND + VOUT Current CH1/2 VVOUT1/2 = 0V 1.5 5 µA VVOUT1/2 = 5V 0.5 5 µA ILIM1/2 Reference Current VILIM = 0V l 10 12 16 µA IND to VOUT Maximum Current CH1/2 VILIM1/2 = 0.5V, VVOUT = 1V (Note 8) 0.5 1.5 3 A VILIM1/2 = 0.5V, VVOUT = 5V (Note 8) 0.7 1.8 3 A VILIM1/2 = 1.5V, VVOUT = 1V (Note 8) l 3.5 4.6 6.4 A VILIM1/2 = 1.5V, VVOUT = 5V (Note 8) l 3.5 4.6 6.4 A Switch Leakage Current CH1/2 VSW1/2 = 0V l 1 10 µA Switch Saturation Voltage CH1/2 ISW1/2 = 500mA, VBST1/2 = 18V 200 mV ISW1/2 = 3A, VBST1/2 = 18V 325 mV Boost Current CH1/2 ISW1/2 = 500mA, VBST1/2 = 8V 5 8 25 mA ISW1/2 = 3A, VBST1/2 = 8V 35 55 85 mA Minimum Boost Voltage CH1/2 (Note 9) ISW1/2 = 3A, VBST1/2 = 8V 1.0 2.2 3.0 V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
The TJ output voltage represents the temperature at the center may cause permanent damage to the device. Exposure to any Absolute of the die while dissipating quiescent power. Due to switch power Maximum Rating condition for extended periods may affect device dissipation and temperature gradients across the die, the TJ output reliability and lifetime. voltage measurement does not guarantee that absolute maximum junction
Note 2:
The LT3992EUH/LT3992EFE is guaranteed to meet performance temperature will not be exceeded. specifications from 0°C to 125°C junction temperature. Specifications over
Note 5:
An internal power on reset (POR) latch is set on the positive the –40°C to 125°C operating junction temperature range are assured by transition of the SHDN1/2 pin through its threshold, thermal shutdown or design, characterization and correlation with statistical process controls. overvoltage lockout. The output of the latch activates current sources on The LT3992IUH/LT3992IFE is guaranteed over the full –40°C to 125°C each SS pin which typically sink 450µA and discharge the SS capacitor. operating junction temperature range. The LT3992HFE is guaranteed The latch is reset when both SS pins are driven below the soft-start POR over the full –40°C to 150°C operating junction temperature range. High threshold or the SHDN pin is taken below its threshold. junction temperatures degrade operating lifetimes. Operating lifetime is
Note 6:
The threshold is expressed as a percentage of the feedback derated at junction temperatures greater than 125°C. reference voltage for the channel.
Note 3:
VIN undervoltage lockout is defined as the voltage which the VIN
Note 7:
To enhance dropout operation, the output switch will be turned off pin must exceed for operation. The threshold guarantees that internal bias for the minimum off-time only when the voltage across the boost capacitor lines are regulated and switching frequency is constant. Actual minimum drops below the minimum boost for 100% duty cycle threshold. input voltage to maintain a regulated output will depend upon output
Note 8:
The IND to V voltage and load current. See the Applications Information section. OUT maximum current is defined as the value of current flowing from the IND pin to the VOUT pin which resets the switch latch when the VC pin is at its high clamp.
Note 9:
This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch. 3992fa 4 For more information www.linear.com/LT3992 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts