Datasheet LTC3703-5 (Analog Devices) - 9

LTC3703-5
U OPERATIO (Refer to Functional Diagram)
When the load current increases, it causes a drop in the feedback voltage relative to the reference. The COMP volt- VOUT age then rises, increasing the duty ratio until the output 50mV/DIV AC COUPLED feedback voltage again matches the reference voltage. In normal operation, the top MOSFET is turned on when the VIN 20V/DIV RS latch is set by the on-chip oscillator and is turned off when the PWM comparator trips and resets the latch. The PWM comparator trips at the proper duty ratio by compar- IL 2A/DIV ing the error amplifier output (after being “compensated” by the line feedforward multiplier) to a sawtooth waveform V 20 37035 F01 OUT = 12V µs/DIV generated by the oscillator. When the top MOSFET is turned ILOAD = 1A 25V TO 60V VIN STEP off, the bottom MOSFET is turned on until the next cycle begins or, if Pulse Skip Mode operation is enabled, until
Figure 1. Line Transient Performance
the inductor current reverses as determined by the reverse current comparator. MAX and MIN comparators ensure
Strong Gate Drivers
that the output never exceed ±5% of nominal value by The LTC3703-5 contains very low impedance drivers monitoring VFB and forcing the output back into regulation capable of supplying amps of current to slew large MOSFET quickly by either keeping the top MOSFET off or forcing gates quickly. This minimizes transition losses and allows maximum duty cycle. The operation of its other features— paralleling MOSFETs for higher current applications. A fast transient response, outstanding line regulation, strong 60V floating high side driver drives the top side MOSFET gate drivers, short-circuit protection, and shutdown/ and a low side driver drives the bottom side MOSFET (see soft-start—are described below. Figure 2). They can be powered from either a separate DC supply or a voltage derived from the input or output
Fast Transient Response
voltage (see MOSFET Driver Supplies section). The bot- The LTC3703-5 uses a fast 25MHz op amp as an error am- tom side driver is supplied directly from the DRVCC pin. plifier. This allows the compensation network to be opti- The top MOSFET drivers are biased from floating boot- mized for better load transient response. The high strap capacitor CB, which normally is recharged during bandwidth of the amplifier, along with high switching fre- each off cycle through an external diode from DRVCC when quencies and low value inductors, allow very high loop the top MOSFET turns off. In Pulse Skip Mode operation, crossover frequencies. The 800mV internal reference allows where it is possible that the bottom MOSFET will be off for regulated output voltages as low as 800mV without exter- an extended period of time, an internal counter guarantees nal level shifting amplifiers. that the bottom MOSFET is turned on at least once every 10 cycles for 10% of the period to refresh the bootstrap
Line Feedforward Compensation
capacitor. An undervoltage lockout keeps the LTC3703-5 shut down unless this voltage is above 4.1V. The LTC3703-5 achieves outstanding line transient re- sponse using a patented feedforward correction scheme. The bottom driver has an additional feature that helps With this circuit the duty cycle is adjusted instantaneously minimize the possibility of external MOSFET shoot-thru. to changes in input voltage, thereby avoiding unaccept- When the top MOSFET turns on, the switch node dV/dt able overshoot or undershoot. It has the added advantage pulls up the bottom MOSFET’s internal gate through the of making the DC loop gain independent of input voltage. Miller capacitance, even when the bottom driver is holding Figure 1 shows how large transient steps at the input have the gate terminal at ground. If the gate is pulled up high little effect on the output voltage. enough, shoot-thru between the top side and bottom side 37035fa 9