LT1766/LT1766-5 APPLICATIONS INFORMATIONFEEDBACK PIN FUNCTIONS regulator to operate at very low duty cycles, and the average current through the diode and inductor is equal The feedback (FB) pin on the LT1766 is used to set output to the short-circuit current limit of the switch (typically 2A voltage and provide several overload protection features. for the LT1766, folding back to less than 1A). Minimum The fi rst part of this section deals with selecting resistors switch on-time limitations would prevent the switcher to set output voltage and the remaining part talks about from attaining a suffi ciently low duty cycle if switching foldback frequency and current limiting created by the FB frequency were maintained at 200kHz, so frequency is pin. Please read both parts before committing to a fi nal reduced by about 5:1 when the feedback pin voltage drops design. The 5V fi xed output voltage part (LT1766-5) has below 0.8V (see Frequency Foldback graph). This does internal divider resistors and the FB pin is renamed SENSE, not affect operation with normal load conditions; one connected directly to the output. simply sees a gear shift in switching frequency during The suggested value for the output divider resistor (see start-up as the output voltage rises. Figure 2) from FB to ground (R2) is 5k or less, and a In addition to lower switching frequency, the LT1766 also formula for R1 is shown below. The output voltage error operates at lower switch current limit when the feedback caused by ignoring the input bias current on the FB pin pin voltage drops below 0.6V. Q2 in Figure 2 performs is less than 0.25% with R2 = 5k. A table of standard 1% this function by clamping the V values is shown in Table 1 for common output voltages. C pin to a voltage less than its normal 2.1V upper clamp level. This foldback current Please read the following if divider resistors are increased limit greatly reduces power dissipation in the IC, diode above the suggested values. and inductor during short-circuit conditions. External syn- R2 V ( −1.22) chronization is also disabled to prevent interference with R OUT 1= 1.22 foldback operation. Again, it is nearly transparent to the user under normal load conditions. The only loads that may be Table 1 affected are current source loads which maintain full load OUTPUTR1% ERROR AT OUTPUT current with output voltage less than 50% of fi nal value. VOLTAGER2(NEAREST 1%)DUE TO DISCREET 1% In these rare situations the feedback pin can be clamped (V)(kΩ)(kΩ)RESISTOR STEPS above 0.6V with an external diode to defeat foldback cur- 3 4.99 7.32 +0.32 rent limit. Caution: clamping the feedback pin means that 3.3 4.99 8.45 –0.43 frequency shifting will also be defeated, so a combination 5 4.99 15.4 –0.30 of high input voltage and dead shorted output may cause 6 4.75 18.7 +0.38 the LT1766 to lose control of current limit. 8 4.47 24.9 +0.20 10 4.32 30.9 –0.54 The internal circuitry which forces reduced switching 12 4.12 36.5 +0.24 frequency also causes current to fl ow out of the feedback 15 4.12 46.4 –0.27 pin when output voltage is low. The equivalent circuitry is shown in Figure 2. Q1 is completely off during normal op- More Than Just Voltage Feedback eration. If the FB pin falls below 0.8V, Q1 begins to conduct current and reduces frequency at the rate of approximately The feedback pin is used for more than just output voltage 1.4kHz/μA. To ensure adequate frequency foldback (under sensing. It also reduces switching frequency and current worst-case short-circuit conditions), the external divider limit when output voltage is very low (see the Frequency Thevinin resistance must be low enough to pull 115μA out Foldback graph in Typical Performance Characteristics). of the FB pin with 0.44V on the pin (R This is done to control power dissipation in both the IC DIV ≤ 3.8k). The net result is that reductions in frequency and current limit are and in the external diode and inductor during short-cir- affected by output voltage divider impedance. Although cuit conditions. A shorted output requires the switching 1766fc 10