Datasheet LTC6420-20 (Analog Devices) - 9

LTC6420-20
APPLICATIONS INFORMATION
matching network while the other input is connected to the
Driving A/D Converters
same matching network and a source resistor. Because the The LTC6420-20 has been specifi cally designed to interface return ratios of the two feedback paths are equal, the two directly with high speed A/D converters. The back page of outputs have the same gain and thus symmetrical swing. In this data sheet shows the LTC6420-20 driving an LTC2285, general, the single-ended input impedance and termination which is a dual 14-bit, 125Msps ADC. resistor RT are determined by the combination of RS, RG and R The V F. For example, when RS is 50Ω, it is found that the OCM pins of the LTC6420-20 are connected to the single-ended input impedance is 202Ω and R V T is 66.5Ω CM pins of the LTC2285, which provide a DC voltage in order to match to a 50Ω source impedance. level of 1.5V. Both ICs are powered from the same 3V supply voltage. The LTC6420-20 is unconditionally stable. However, the overall differential gain is affected by both source The inputs to the LTC6420-20 can be confi gured in various impedance and load impedance as follows: ways, as described in the Input Impedance and Matching section of this data sheet. The outputs of the LTC6420-20 V 2000 R may be connected directly to the analog inputs of an ADC, A OUT • L V = = V R 25 + R or a simple lowpass or bandpass fi lter network may be IN S + 200 L inserted to reduce out-of-band noise.
Output Impedance Match Test Circuits
The LTC6420-20 can drive an ADC directly without external Due to the fully-differential design of the LTC6420 and output impedance matching. Alternatively, the differential its usefulness in applications with differing characteristic output impedance of 25Ω can be matched to a higher specifi cations, two test circuits are used to generate the value impedance, e.g. 50Ω, by series resistors or an LC information in this data sheet. Test Circuit A is DC1299, a network. two-port demonstration circuit for the LTC6420/LTC6421 family. The schematic and silkscreen are shown in Figure 4.
Output Common Mode Adjustment
This circuit includes input and output transformers (baluns) The output common mode voltage is set by the VOCM pin, for single-ended-to-differential conversion and impedance which is a high impedance input. The output common transformation, allowing direct hook-up to a 2-port network mode voltage is capable of tracking V analyzer. There are also series resistors at the output to OCM in a range from 1.1V to 1.6V. The bandwidth of V avoid loading the amplifi er directly with a 50Ω load. Due OCM control is typically 15MHz, which is dominated by a low pass fi lter connected to the input and output transformers, the –3dB bandwidth to the V is reduced from 1.8GHz to approximately 1.3GHz. OCM pin and is aimed to reduce common mode noise generation at the outputs. The internal common Test Circuit B uses a 4-port network analyzer to measure mode feedback loop has a –3dB bandwidth of 300MHz, S-parameters and gain/phase response. This removes the allowing fast rejection of any common mode output voltage effects of the wideband baluns and associated circuitry, disturbance. The VOCM pin should be tied to a DC bias for a true picture of the >1GHz S-parameters and AC voltage with a 0.1μF bypass capacitor. When interfacing characteristics. with A/D converters such as the LTC22xx families, the VOCM pin can be connected to the VCM pin of the ADC. 642020fb 9 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION SELECTOR GUIDE DC ELECTRICAL CHARACTERISTICS AC ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS