LTC6404 ELECTRICAL CHARACTERISTICSNote 1: Stresses beyond those listed under Absolute Maximum Ratings The voltage range for the output common mode range is tested using the may cause permanent damage to the device. Exposure to any Absolute test circuit of Figure 1 by applying a voltage on the VOCM pin and testing at Maximum Rating condition for extended periods may affect device both mid-supply and at the Electrical Characteristics table limits to verify reliability and lifetime. that the the common mode offset (VOSCM) has not deviated by more than Note 2: The inputs IN+, IN– are protected by a pair of back-to-back diodes. ±15mV (LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4). If the differential input voltage exceeds 1.4V, the input current should be Note 8: Input CMRR is defi ned as the ratio of the change in the input limited to less than 10mA. Input pins (IN+, IN–, VOCM and SHDN) are also common mode voltage at the pins IN+ or IN– to the change in differential protected by steering diodes to either supply. If the inputs should exceed input referred voltage offset. Output CMRR is defi ned as the ratio of the either supply voltage, the input current should be limited to less than change in the voltage at the VOCM pin to the change in differential input 10mA. referred voltage offset. These specifi cations are strongly dependent on Note 3: A heat sink may be required to keep the junction temperature feedback ratio matching between the two outputs and their respective below the absolute maximum rating when the output is shorted inputs, and is diffi cult to measure actual amplifi er performance. (See “The indefi nitely. Long-term application of output currents in excess of the Effects of Resistor Pair Mismatch” in the Applications Information section absolute maximum ratings may impair the life of the device. of this data sheet. For a better indicator of actual amplifi er performance Note 4: The LTC6404C/LTC6404I are guaranteed functional over the independent of feedback component matching, refer to the PSRR operating temperature range –40°C to 85°C. The LTC6404H is guaranteed specifi cation. functional over the operating temperature range –40°C to 125°C. Note 9: Differential power supply rejection (PSRR) is defi ned as the ratio Note 5: The LTC6404C is guaranteed to meet specifi ed performance from of the change in supply voltage to the change in differential input referred 0°C to 70°C. The LTC6404C is designed, characterized, and expected voltage offset. Common mode power supply rejection (PSRRCM) is to meet specifi ed performance from –40°C to 85°C but is not tested or defi ned as the ratio of the change in supply voltage to the change in the QA sampled at these temperatures. The LTC6404I is guaranteed to meet common mode offset, VOUTCM – VOCM. specifi ed performance from –40°C to 85°C. The LTC6404H is guaranteed Note 10: This parameter is pulse tested. Output swings are measured as to meet specifi ed performance from –40°C to 125°C. differences between the output and the respective power supply rail. Note 6: Input bias current is defi ned as the average of the input currents Note 11: This parameter is pulse tested. Extended operation with the fl owing into Pin 6 and Pin 15 (IN– and IN+). Input offset current is defi ned output shorted may cause junction temperatures to exceed the 125°C limit as the difference of the input currents fl owing into Pin 15 and Pin 6 and is not recommended. See Note 3 for more details. (I + – OS = IB – IB ) Note 12: Since the LTC6404 is a voltage feedback amplifi er with low Note 7: Input common mode range is tested using the test circuit of output impedance, a resistive load is not required when driving an ADC. Figure 1 by measuring the differential gain with a ±1V differential output Therefore, typical output power is very small. In order to compare the with V LTC6404 with amplifi ers that require 50Ω output loads, output swing of ICM = mid-supply, and with VICM at the input common mode range limits listed in the Electrical Characteristics table, verifying the differential the LTC6404 driving an ADC is converted into an “effective” OIP3 as if the gain has not deviated from the mid-supply common mode input case LTC6404 were driving a 50Ω load. by more than 1%, and the common mode offset (VOSCM) has not Note 13: The capacitors used to set the fi lter pole might have up to ±15% deviated from the zero bias common mode offset by more than ±15mV variation. The resistors used to set the fi lter pole might have up to ±12% (LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4). variation. 6404f 7