Datasheet AD8351 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | Low Distortion Differential RF/IF Amplifier |
| 页数 / 页 | 12 / 3 — Enhanced Product. AD8351-EP. SPECIFICATIONS. Table 1. Parameter. Test … |
| 修订版 | A |
| 文件格式/大小 | PDF / 378 Kb |
| 文件语言 | 英语 |
Enhanced Product. AD8351-EP. SPECIFICATIONS. Table 1. Parameter. Test Conditions/Comments. Min Typ. Max Unit
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Enhanced Product AD8351-EP SPECIFICATIONS
VS = 5 V, RL = 150 Ω, RG = 110 Ω (AV = 10 dB), f = 70 MHz, T = 25°C, parameters specified differentially, unless otherwise noted. The gain (AV) can be set to any value between 0 dB and 26 dB.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth AV = 6 dB, VOUT ≤ 1.0 V p-p 3000 MHz AV = 12 dB, VOUT ≤ 1.0 V p-p 2200 MHz AV = 18 dB, VOUT ≤ 1.0 V p-p 600 MHz Bandwidth for 0.1 dB Flatness 0 dB ≤ AV ≤ 20 dB, VOUT ≤ 1.0 V p-p 200 MHz Bandwidth for 0.2 dB Flatness 0 dB ≤ AV ≤ 20 dB, VOUT ≤ 1.0 V p-p 400 MHz Gain Accuracy Using 1% resistor for RG, 0 dB ≤ AV ≤ 20 dB ±1 dB Gain Supply Sensitivity VS ± 5% 0.08 dB/V Gain Temperature Sensitivity −55°C to +105°C 3.9 mdB/°C Slew Rate RL = 1 kΩ, VOUT = 2 V step 13,000 V/µs RL = 150 Ω, VS = 2 V step 7500 V/µs Settling Time 1 V step to 1% <3 ns Overdrive Recovery Time VIN = 4 V to 0 V step, VOUT ≤ ±10 mV <2 ns Reverse Isolation (S12) −67 dB INPUT/OUTPUT CHARACTERISTICS Input Common-Mode Voltage Adjustment Range 1.2 to 3.8 V Maximum Output Voltage Swing 1 dB compressed 4.75 V p-p Output Common-Mode Offset 40 mV Output Common-Mode Drift −55°C to +105°C 0.24 mV/°C Output Differential Offset Voltage 20 mV Output Differential Offset Drift −55°C to +105°C 0.13 mV/°C Input Bias Current ±15 µA Input Resistance1 5 kΩ Input Capacitance1 0.8 pF Common-Mode Rejection Ratio (CMRR) 43 dB Output Resistance1 150 Ω Output Capacitance1 0.8 pF POWER INTERFACE Supply Voltage 3 5.5 V PWUP Threshold 1.3 V PWUP Input Bias Current PWUP at 5 V 100 µA PWUP at 0 V 25 µA Quiescent Current −55°C to +105°C 28 35 mA NOISE/DISTORTION 10 MHz Second/Third Harmonic Distortion2 RL = 1 kΩ, VOUT = 2 V p-p −95/−93 dBc RL = 150 Ω, VOUT = 2 V p-p −80/−69 dBc Third-Order Intermodulation Distortion (IMD) RL = 1 kΩ, f1 = 9.5 MHz, f2 = 10.5 MHz, −90 dBc VOUT = 2 V p-p composite RL = 150 Ω, f1 = 9.5 MHz, f2 = 10.5 MHz, −70 dBc VOUT = 2 V p-p composite Output Third-Order Intercept f1 = 9.5 MHz, f2 = 10.5 MHz 33 dBm Noise Spectral Density (Referred to Input (RTI)) 2.65 nV/√Hz 1 dB Compression Point 13.5 dBm Rev. A | Page 3 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
Enhanced Product AD8351-EP SPECIFICATIONS
VS = 5 V, RL = 150 Ω, RG = 110 Ω (AV = 10 dB), f = 70 MHz, T = 25°C, parameters specified differentially, unless otherwise noted. The gain (AV) can be set to any value between 0 dB and 26 dB.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth AV = 6 dB, VOUT ≤ 1.0 V p-p 3000 MHz AV = 12 dB, VOUT ≤ 1.0 V p-p 2200 MHz AV = 18 dB, VOUT ≤ 1.0 V p-p 600 MHz Bandwidth for 0.1 dB Flatness 0 dB ≤ AV ≤ 20 dB, VOUT ≤ 1.0 V p-p 200 MHz Bandwidth for 0.2 dB Flatness 0 dB ≤ AV ≤ 20 dB, VOUT ≤ 1.0 V p-p 400 MHz Gain Accuracy Using 1% resistor for RG, 0 dB ≤ AV ≤ 20 dB ±1 dB Gain Supply Sensitivity VS ± 5% 0.08 dB/V Gain Temperature Sensitivity −55°C to +105°C 3.9 mdB/°C Slew Rate RL = 1 kΩ, VOUT = 2 V step 13,000 V/µs RL = 150 Ω, VS = 2 V step 7500 V/µs Settling Time 1 V step to 1% <3 ns Overdrive Recovery Time VIN = 4 V to 0 V step, VOUT ≤ ±10 mV <2 ns Reverse Isolation (S12) −67 dB INPUT/OUTPUT CHARACTERISTICS Input Common-Mode Voltage Adjustment Range 1.2 to 3.8 V Maximum Output Voltage Swing 1 dB compressed 4.75 V p-p Output Common-Mode Offset 40 mV Output Common-Mode Drift −55°C to +105°C 0.24 mV/°C Output Differential Offset Voltage 20 mV Output Differential Offset Drift −55°C to +105°C 0.13 mV/°C Input Bias Current ±15 µA Input Resistance1 5 kΩ Input Capacitance1 0.8 pF Common-Mode Rejection Ratio (CMRR) 43 dB Output Resistance1 150 Ω Output Capacitance1 0.8 pF POWER INTERFACE Supply Voltage 3 5.5 V PWUP Threshold 1.3 V PWUP Input Bias Current PWUP at 5 V 100 µA PWUP at 0 V 25 µA Quiescent Current −55°C to +105°C 28 35 mA NOISE/DISTORTION 10 MHz Second/Third Harmonic Distortion2 RL = 1 kΩ, VOUT = 2 V p-p −95/−93 dBc RL = 150 Ω, VOUT = 2 V p-p −80/−69 dBc Third-Order Intermodulation Distortion (IMD) RL = 1 kΩ, f1 = 9.5 MHz, f2 = 10.5 MHz, −90 dBc VOUT = 2 V p-p composite RL = 150 Ω, f1 = 9.5 MHz, f2 = 10.5 MHz, −70 dBc VOUT = 2 V p-p composite Output Third-Order Intercept f1 = 9.5 MHz, f2 = 10.5 MHz 33 dBm Noise Spectral Density (Referred to Input (RTI)) 2.65 nV/√Hz 1 dB Compression Point 13.5 dBm Rev. A | Page 3 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE