Datasheet AD8369 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 600 MHz, 45 dB Digitally Controlled Variable Gain Amplifier |
| 页数 / 页 | 24 / 9 — AD8369. 9.0. 2.0. 8.5. 1.5. 8.0. 1.0. 7.5. 0.5. 7.0. 6.5. –0.5. P1dB – … |
| 修订版 | A |
| 文件格式/大小 | PDF / 671 Kb |
| 文件语言 | 英语 |
AD8369. 9.0. 2.0. 8.5. 1.5. 8.0. 1.0. 7.5. 0.5. 7.0. 6.5. –0.5. P1dB – dBm 6.0. –1.0. P1dB – dBm. P1dB – dBV rms. 5.5. –1.5. 5.0. –2.0. 4.5. –2.5. 4.0. –3.0. 10 11 12
该数据表的模型线
文件文字版本
AD8369 9.0 2.0 9 2 8.5 1.5 8 1 8.0 1.0 7 0 7.5 0.5 6 –1 7.0 0 5 –2 6.5 –0.5 4 –3 P1dB – dBm 6.0 –1.0 P1dB – dBm P1dB – dBV rms 3 P1dB – dBV rms –4 5.5 –1.5 5.0 –2.0 2 –5 4.5 –2.5 1 –6 4.0 –3.0 0 –7 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 10 100 1000 GAIN CODE FREQUENCY – MHz
TPC 13. Output P1dB vs. Gain Code at 70 MHz, TPC 16. Output P1dB vs. Frequency, VS = 5 V, VS = 5 V, RL = 200 W RL = 200 W, Maximum Gain
80
ⴚ
40 70
ⴚ
50 60
ⴚ
60 50 TION – dB 40
ⴚ
70 CMRR – dB 30
ⴚ
80 20 REVERSE ISOLA
ⴚ
90 10 0
ⴚ
100 10 100 1000 10 100 1000 FREQUENCY – MHz FREQUENCY – MHz
TPC 14. Common-Mode Rejection Ratio vs. Frequency TPC 17. Reverse Isolation vs. Frequency at at Maximum Gain, VS = 5 V, RL = 200 W (Refer to Maximum Gain, VS = 5 V, RL = 200 W (Refer to Appendix for Definition) Appendix for Definition)
250 0.75 250 0.75 R R
⍀
200 INHI 0.50
⍀
200 0.50 ANCE – ANCE – pF ANCE – ANCE – pF CIT CIT A C A RESIST 150 0.25 RESIST CAP OPHI 150 0.25 CAP INLO C OPLO 100 0 100 0 10 100 1000 10 100 1000 FREQUENCY – MHz FREQUENCY – MHz
TPC 15. Equivalent Input Resistance and TPC 18. Equivalent Output Resistance and Capacitance vs. Frequency at Maximum Gain Capacitance vs. Frequency at Maximum Gain REV. A –9– Document Outline Features Applications Functional Block Diagram Product Description Specifications Timing Specifications Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Theroy of Operation Input Attentuator and Output 3 dB Step Fixed Gain Amplifier Input and Output Interfaces Noise and Distortion Offset Control Loop Digital Control Basic Connections Input-Output Interface Reducing Gain Sensitivity to Input and Output Impedance Variation Operation from a Single-Sided Source Interfacing to an ADC PCB Layout Considerations Evaluation Board Evaluation Board Software Appendix Characterization Equipment Definitions of Selected Parameters Composite Waveform Assumption Outline Dimensions Ordering Guide Revision History
TPC 13. Output P1dB vs. Gain Code at 70 MHz, TPC 16. Output P1dB vs. Frequency, VS = 5 V, VS = 5 V, RL = 200 W RL = 200 W, Maximum Gain
80
ⴚ
40 70
ⴚ
50 60
ⴚ
60 50 TION – dB 40
ⴚ
70 CMRR – dB 30
ⴚ
80 20 REVERSE ISOLA
ⴚ
90 10 0
ⴚ
100 10 100 1000 10 100 1000 FREQUENCY – MHz FREQUENCY – MHz
TPC 14. Common-Mode Rejection Ratio vs. Frequency TPC 17. Reverse Isolation vs. Frequency at at Maximum Gain, VS = 5 V, RL = 200 W (Refer to Maximum Gain, VS = 5 V, RL = 200 W (Refer to Appendix for Definition) Appendix for Definition)
250 0.75 250 0.75 R R
⍀
200 INHI 0.50
⍀
200 0.50 ANCE – ANCE – pF ANCE – ANCE – pF CIT CIT A C A RESIST 150 0.25 RESIST CAP OPHI 150 0.25 CAP INLO C OPLO 100 0 100 0 10 100 1000 10 100 1000 FREQUENCY – MHz FREQUENCY – MHz
TPC 15. Equivalent Input Resistance and TPC 18. Equivalent Output Resistance and Capacitance vs. Frequency at Maximum Gain Capacitance vs. Frequency at Maximum Gain REV. A –9– Document Outline Features Applications Functional Block Diagram Product Description Specifications Timing Specifications Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Theroy of Operation Input Attentuator and Output 3 dB Step Fixed Gain Amplifier Input and Output Interfaces Noise and Distortion Offset Control Loop Digital Control Basic Connections Input-Output Interface Reducing Gain Sensitivity to Input and Output Impedance Variation Operation from a Single-Sided Source Interfacing to an ADC PCB Layout Considerations Evaluation Board Evaluation Board Software Appendix Characterization Equipment Definitions of Selected Parameters Composite Waveform Assumption Outline Dimensions Ordering Guide Revision History