Datasheet LTC6915 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Zero Drift, Precision Instrumentation Amplifier with Digitally Programmable Gain |
| 页数 / 页 | 18 / 5 — elecTrical characTerisTics. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 297 Kb |
| 文件语言 | 英语 |
elecTrical characTerisTics. The. denotes the specifications which apply over the full operating
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LTC6915
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
CMRR Common Mode Rejection Ratio AV = 1024, VCM = –5V to 5V, LTC6915C l 105 123 dB AV = 1024, VCM = –4.9V to 4.9V, LTC6915I l 105 123 dB AV = 1024, VCM = –5V to 5V, LTC6915I l 100 123 dB AV = 1024, VCM = –4.9V to 4.9V, LTC6915H l 100 dB AV = 1024, VCM = –5V to 4.97V, LTC6915H l 90 dB PSRR Power Supply Rejection Ratio (Note 5) VS = 2.7V to 11V l 110 116 dB Output Voltage Swing High Sourcing 200µA l 4.97 4.99 V Sourcing 2mA l 4.90 4.96 V Output Voltage Swing Low Sinking 200µA l –4.98 –4.92 V Sinking 2mA l –4.90 –4.70 V Supply Current, Parallel Mode No Load, VCM = 0mV l 1.1 1.6 mA Supply Current, Serial Mode (Note 6) No Load at OUT, Capacitive Load at l 1.73 2.48 mA DOUT (CL) = 15pF, Continuous CLK Frequency = 4MHz, CS = LOW, Gain Control Code = 0001 Supply Current, Shutdown VSHDN = 4V (Hardware Shutdown) l 25 µA VSHDN = 1V, Gain Control Code = 0000 l 160 240 µA (Software Shutdown) SHDN Input High l 4 V SHDN Input Low l 1 V
V+ = 5V, V– = –5V, VREF = 0V
SHDN and HOLD_THRU Input Current (Note 2) l 5 µA Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs Internal Sampling Frequency 3 kHz
Digital I/O, All Digital I/O Voltage Referenced to DGND
VIH Digital Input High Voltage l 2.0 V VIL Digital Input Low Voltage l 0.8 V VOH Digital Output High Voltage Sourcing 500µA l V+ – 0.3 V VOL Digital Output Low Voltage Sinking 500µA l 0.3 V Digital Input Leakage V+ = 5V, V– = –5V, VIN = 0V to 5V l ±2 µA
Timing, V+ = 2.7V to 4.5V, V– = 0V (Note 7)
t1 DIN Valid to CLK Setup l 60 ns t2 DIN Valid to CLK Hold l 0 ns t3 CLK Low l 100 ns t4 CLK High l 100 ns t5 CS/LD Pulse Width l 60 ns t6 LSB CLK to CS/LD l 60 ns t7 CS/LD Low to CLK l 30 ns t8 DOUT Output Delay CL = 15pF l 125 ns t9 CLK Low to CS/LD Low l 0 ns 6915fb 5 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagrams Timing Diagram Operation Typical Application Package Description Revision History Typical Application Related Parts
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
CMRR Common Mode Rejection Ratio AV = 1024, VCM = –5V to 5V, LTC6915C l 105 123 dB AV = 1024, VCM = –4.9V to 4.9V, LTC6915I l 105 123 dB AV = 1024, VCM = –5V to 5V, LTC6915I l 100 123 dB AV = 1024, VCM = –4.9V to 4.9V, LTC6915H l 100 dB AV = 1024, VCM = –5V to 4.97V, LTC6915H l 90 dB PSRR Power Supply Rejection Ratio (Note 5) VS = 2.7V to 11V l 110 116 dB Output Voltage Swing High Sourcing 200µA l 4.97 4.99 V Sourcing 2mA l 4.90 4.96 V Output Voltage Swing Low Sinking 200µA l –4.98 –4.92 V Sinking 2mA l –4.90 –4.70 V Supply Current, Parallel Mode No Load, VCM = 0mV l 1.1 1.6 mA Supply Current, Serial Mode (Note 6) No Load at OUT, Capacitive Load at l 1.73 2.48 mA DOUT (CL) = 15pF, Continuous CLK Frequency = 4MHz, CS = LOW, Gain Control Code = 0001 Supply Current, Shutdown VSHDN = 4V (Hardware Shutdown) l 25 µA VSHDN = 1V, Gain Control Code = 0000 l 160 240 µA (Software Shutdown) SHDN Input High l 4 V SHDN Input Low l 1 V
V+ = 5V, V– = –5V, VREF = 0V
SHDN and HOLD_THRU Input Current (Note 2) l 5 µA Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs Internal Sampling Frequency 3 kHz
Digital I/O, All Digital I/O Voltage Referenced to DGND
VIH Digital Input High Voltage l 2.0 V VIL Digital Input Low Voltage l 0.8 V VOH Digital Output High Voltage Sourcing 500µA l V+ – 0.3 V VOL Digital Output Low Voltage Sinking 500µA l 0.3 V Digital Input Leakage V+ = 5V, V– = –5V, VIN = 0V to 5V l ±2 µA
Timing, V+ = 2.7V to 4.5V, V– = 0V (Note 7)
t1 DIN Valid to CLK Setup l 60 ns t2 DIN Valid to CLK Hold l 0 ns t3 CLK Low l 100 ns t4 CLK High l 100 ns t5 CS/LD Pulse Width l 60 ns t6 LSB CLK to CS/LD l 60 ns t7 CS/LD Low to CLK l 30 ns t8 DOUT Output Delay CL = 15pF l 125 ns t9 CLK Low to CS/LD Low l 0 ns 6915fb 5 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagrams Timing Diagram Operation Typical Application Package Description Revision History Typical Application Related Parts