Datasheet LT1797 (Analog Devices) - 8

LT1797
applicaTions inForMaTion Supply Voltage
The input stage of the LT1797 incorporates phase reversal The positive supply pin of the LT1797 should be bypassed protection to prevent false outputs from occurring when with a small capacitor (about 0.1µF) within an inch of the the inputs are driven up to 5V beyond the rails. Protective pin. When driving heavy loads an additional 4.7µF electro- resistors are included in the input leads so that current lytic capacitor should be used. When using split supplies does not become excessive when the inputs are forced the same is true for the negative supply pin. beyond the supplies or when a large differential signal is applied.
Inputs Output
The LT1797 is fully functional for an input signal range from the negative supply to the positive supply. Figure 1 The output is configured with a pair of complementary shows a simplified schematic of the amplifier. The input common emitter stages Q19/Q20, which enable the output stage consists of two differential amplifiers, a PNP stage to swing from rail-to-rail. The output voltage swing of the Q3/Q4 and an NPN stage Q1/Q2 that are active over dif- LT1797 is affected by input overdrive as shown in the Typi- ferent ranges of input common mode voltage. The PNP cal Performance Characteristics. When monitoring input differential pair is active for input common mode voltages voltages within 50mV of V+ or within 8mV of V–, some V gain should be taken to keep the output from clipping. The CM between the negative supply to approximately 1.3V below the positive supply. As V output of the LT1797 can deliver large load currents; the CM moves closer toward the positive supply, the transistor QB1 will steer the tail short-circuit current limit is typically 50mA at ±5V. Take current I1 to the current mirror Q5/Q6, activating the care to keep the junction temperature of the IC below the NPN differential pair and the PNP pair becomes inactive absolute maximum rating of 150°C. The output of the for the rest of the input common mode range up to the amplifier has reverse biased diodes to each supply. If the positive supply. output is forced beyond either supply, unlimited current will flow through these diodes. The input offset voltage and the input bias current are dependent on which input stage is active. The input offset The LT1797 can drive capacitive loads up to 200pF on voltage is trimmed on a single 5V supply with the common a single 5V supply in a unity gain configuration. When mode at 1/2 supply and is typically 1mV with the PNP stage there is a need to drive larger capacitive loads, a resistor active. The input offset of the NPN stage is untrimmed and of a couple hundred ohms should be connected between is typically 1.5mV. The input bias current polarity depends the output and the capacitive load. The feedback should on the input common mode voltage. When the PNP dif- still be taken from the output so that the resistor isolates ferential pair is active, the input bias currents flow out of the capacitive load to ensure stability. The low input bias the input pins. They flow in the opposite direction when current of the LT1797 makes it possible to use high value the NPN input stage is active. The offset error due to the feedback resistors to set the gain. However, care must input bias currents can be minimized by equalizing the be taken to insure that the pole formed by the feedback noninverting and inverting source impedance. resistors and the total capacitance at the inverting input does not degrade stability. 1797fc 8 For more information www.linear.com/LT1797