LT6557 PIN FUNCTIONS V+ B (Pin 9): Positive Supply Voltage of Blue Channel the supply voltage bus with proper bypassing for best Amplifi er. This pin is not internally connected to other performance, see Power Supply Considerations. supply voltage pins and must be externally connected to OUT R (Pin 14): Red Channel Output. the supply voltage bus with proper bypassing for best performance, see Power Supply Considerations. V+ (Pin 15): Positive Supply Voltage of Control Circuitry. This pin is not internally connected to other supply voltage OUT B (Pin 10): Blue Channel Output. pins and must be externally connected to supply voltage V+ G (Pin 11): Positive Supply Voltage of Green Channel bus with proper bypassing for best performance, see Amplifi er. This pin is not internally connected to other Power Supply Considerations. supply voltage pins and must be externally connected to BCV (Pin 16): Bias Control Voltage. A resistor connected the supply voltage bus with proper bypassing for best between Pin 16 and Pin 2 (GND) will generate a DC voltage performance, see Power Supply Considerations. bias at the inputs of the three amplifi ers for AC coupling OUT G (Pin 12): Green Channel Output. application, see Programmable Input Bias. V+ R (Pin 13): Positive Supply Voltage of Red Channel Exposed Pad (Pin 17, DFN Package): Ground. This pad Amplifi er. This pin is not internally connected to other must be soldered to PCB and is internally connected to supply voltage pins and must be externally connected to GND (Pin 2). APPLICATIONS INFORMATIONPower Supply Considerations The grounds are separately pinned for each amplifi er to minimize crosstalk. The LT6557 is optimized to provide full video signal swing output when operated from a standard 5V single supply. Operation from split supplies can be accomplished by Due to the supply current involved in ultrahigh slew rate connecting the LT6557 ground pins to the negative rail. amplifi ers like the LT6557, selection of the lowest workable Since the amplifi er gain is referenced to its ground pins, supply voltage is recommended to minimize heat genera- the actual signals are referenced to the negative rail, in tion and simplify thermal management. Temperature rise this case, and DC coupled applications need to take this at the internal devices (TJ) must be kept below 150°C into consideration. With dual supplies, recommended (SSOP package) or 125°C (DFN package), and can be voltages range from nominal ±2.5V to ±3.3V. estimated from the ambient temperature (TA) and power The ultrahigh frequency (UHF) operating range of the dissipation (PD) as follows: LT6557 requires that careful printed circuit layout prac- TJ = TA + PD • 40°C/W for DFN package tices be followed to obtain maximum performance. Trace lengths between power pins and bypass capacitors should or be minimized (<0.1 inch) and one or more dedicated TJ = TA + PD • 110°C/W for SSOP package ground planes should be employed to minimize parasitic where P inductance. Poor layout or breadboarding methods can D = (IS + 0.5 • IO) • VS(TOTAL) seriously impact amplifi er stability, frequency response The latter equation assumes (conservatively) that the output and crosstalk performance. A 2.2µF and a 10µF bypass swing is small relative to the supply and RMS load current capacitor is recommended for the LT6557supply bus, plus (IO) is bidirectional (as with AC coupling). a 10nF high frequency bypass capacitor at each individual power pin. 6557fa 8