Datasheet LT1970 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 500mA Power Op Amp with Adjustable Precision Current Limit |
| 页数 / 页 | 26 / 4 — elecTrical characTerisTics. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 402 Kb |
| 文件语言 | 英语 |
elecTrical characTerisTics. The. denotes the specifications which apply over the full operating
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LT1970
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. See Test Circuit for standard test conditions. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Current Sense Bandwidth 2 MHz RCSF Resistance FILTER to SENSE– l 750 1000 1250 Ω
Logic I/O Characteristics
Logic Output Leakage ISRC, ISNK, TSD V = 15V l 1 µA Logic Low Output Level I = 5mA (Note 6) l 0.2 0.4 V Logic Output Current Limit 25 mA VENABLE Enable Logic Threshold l 0.8 1.9 2.5 V IENABLE Enable Pin Bias Current l –1 1 µA ISUPPLY Total Supply Current VCC, V+ and V–, VEE Connected l 7 13 mA ICC VCC Supply Current VCC, V+ and V–, VEE Separate l 3 7 mA ICC(STBY) Supply Current Disabled VCC, V+ and V–, VEE Connected, VENABLE ≤ 0.8V l 0.6 1.5 mA tON Turn-On Delay (Note 7) 10 µs tOFF Turn-Off Delay (Note 7) 10 µs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
This parameter is not 100% tested. may cause permanent damage to the device. Exposure to any Absolute
Note 5:
Full power bandwidth is calculated from slew rate measurements: Maximum Rating condition for extended periods may affect device reli- FPBW = SR/(2 • π • VP) ability and lifetime.
Note 6:
The logic low output level of pin TSD is guaranteed by correlating
Note 2:
The LT1970C is guaranteed functional over the operating tempera- the output level of pin ISRC and pin ISNK over temperature. ture range of –40°C and 85°C.
Note 7:
Turn-on and turn-off delay are measured from VENABLE crossing
Note 3:
The LT1970C is guaranteed to meet specified performance from 1.6V to the OUT pin at 90% of normal output voltage. 0°C to 70°C. The LT1970C is designed, characterized and expected to
Note 8:
Thermal resistance varies depending upon the amount of PC board meet specified performance from –40°C to 85°C but is not tested or QA metal attached to the device. If the maximum dissipation of the package is sampled at these temperatures. The LT1970I is guaranteed to meet speci- exceeded, the device will go into thermal shutdown and be protected. fied performance from –40°C to 85°C.
Typical perForMance characTerisTics Total Supply Current Warm-Up Drift VIO vs Time Input Bias Current vs VCM vs Supply Voltage
–100 14 VS = ±15V 12 –120 I 125°C 10 CC + IV+ 8 –140 25°C –I 6 BIAS –160 4 –55°C +IBIAS 2 • 1000 (50mV/DIV) –180 0 IEE + IV– 0V –2 V OS –55°C –200 –4 –6 INPUT BIAS CURRENT (nA) –220 25°C –8 TIME (100ms/DIV) TOTAL SUPPLY CURRENT (mA) 1970 G01 –240 –10 125°C –12 –260 –14 –15 –12 –9 –6 –3 0 3 6 9 12 15 0 2 4 6 8 10 12 14 16 18 COMMON MODE INPUT VOLTAGE (V) SUPPLY VOLTAGE (±V) 1970 G02 1970 G03 1970fe 4 For more information www.linear.com/LT1970 Document Outline Description Typical Application Absolute Maximum Ratings Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Package Description Related Parts
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. See Test Circuit for standard test conditions. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Current Sense Bandwidth 2 MHz RCSF Resistance FILTER to SENSE– l 750 1000 1250 Ω
Logic I/O Characteristics
Logic Output Leakage ISRC, ISNK, TSD V = 15V l 1 µA Logic Low Output Level I = 5mA (Note 6) l 0.2 0.4 V Logic Output Current Limit 25 mA VENABLE Enable Logic Threshold l 0.8 1.9 2.5 V IENABLE Enable Pin Bias Current l –1 1 µA ISUPPLY Total Supply Current VCC, V+ and V–, VEE Connected l 7 13 mA ICC VCC Supply Current VCC, V+ and V–, VEE Separate l 3 7 mA ICC(STBY) Supply Current Disabled VCC, V+ and V–, VEE Connected, VENABLE ≤ 0.8V l 0.6 1.5 mA tON Turn-On Delay (Note 7) 10 µs tOFF Turn-Off Delay (Note 7) 10 µs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
This parameter is not 100% tested. may cause permanent damage to the device. Exposure to any Absolute
Note 5:
Full power bandwidth is calculated from slew rate measurements: Maximum Rating condition for extended periods may affect device reli- FPBW = SR/(2 • π • VP) ability and lifetime.
Note 6:
The logic low output level of pin TSD is guaranteed by correlating
Note 2:
The LT1970C is guaranteed functional over the operating tempera- the output level of pin ISRC and pin ISNK over temperature. ture range of –40°C and 85°C.
Note 7:
Turn-on and turn-off delay are measured from VENABLE crossing
Note 3:
The LT1970C is guaranteed to meet specified performance from 1.6V to the OUT pin at 90% of normal output voltage. 0°C to 70°C. The LT1970C is designed, characterized and expected to
Note 8:
Thermal resistance varies depending upon the amount of PC board meet specified performance from –40°C to 85°C but is not tested or QA metal attached to the device. If the maximum dissipation of the package is sampled at these temperatures. The LT1970I is guaranteed to meet speci- exceeded, the device will go into thermal shutdown and be protected. fied performance from –40°C to 85°C.
Typical perForMance characTerisTics Total Supply Current Warm-Up Drift VIO vs Time Input Bias Current vs VCM vs Supply Voltage
–100 14 VS = ±15V 12 –120 I 125°C 10 CC + IV+ 8 –140 25°C –I 6 BIAS –160 4 –55°C +IBIAS 2 • 1000 (50mV/DIV) –180 0 IEE + IV– 0V –2 V OS –55°C –200 –4 –6 INPUT BIAS CURRENT (nA) –220 25°C –8 TIME (100ms/DIV) TOTAL SUPPLY CURRENT (mA) 1970 G01 –240 –10 125°C –12 –260 –14 –15 –12 –9 –6 –3 0 3 6 9 12 15 0 2 4 6 8 10 12 14 16 18 COMMON MODE INPUT VOLTAGE (V) SUPPLY VOLTAGE (±V) 1970 G02 1970 G03 1970fe 4 For more information www.linear.com/LT1970 Document Outline Description Typical Application Absolute Maximum Ratings Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Package Description Related Parts