Datasheet LT6300 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | 500mA, 200MHz xDSL Line Driver in 16-Lead SSOP Package |
| 页数 / 页 | 16 / 8 — APPLICATIO S I FOR ATIO. Figure 3. RBIAS to Ground Current Control. Two … |
| 文件格式/大小 | PDF / 240 Kb |
| 文件语言 | 英语 |
APPLICATIO S I FOR ATIO. Figure 3. RBIAS to Ground Current Control. Two Control Inputs. RESISTOR VALUES (k. SHDN TO VCC (12V)
该数据表的模型线
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LT6300
U U W U APPLICATIO S I FOR ATIO
45 VS = ±12V V+ = 12V 40 SHDN 35 V+ – 1.2V I ≈ S PER AMPLIFIER (mA) • 64 R 30 BIAS + 5k 25 R V+ – 1.2V BIAS = • 64 – 5k 20 IS PER AMPLIFIER (mA) PER AMPLIFIER (mA) SHDNREF 15 RBIAS I SUPPLY 10 5 0 4 7 10 30 50 70 90 100 130 150 170 190 210 230 250 270 290 RBIAS (kΩ) 6300 F03
Figure 3. RBIAS to Ground Current Control Two Control Inputs
12V OR VLOGIC
RESISTOR VALUES (k
Ω
)
R
R
V SHDN
SHDN TO VCC (12V) RSHDN TO VLOGIC
LOGIC RC1
VLOGIC 3V 3.3V 5V 3V 3.3V 5V
VC1 SHDN
RSHDN
40.2 43.2 60.4 4.99 6.81 19.6 R 0V C0 V 2k
R
C0
C1
11.5 13.0 21.5 8.66 10.7 20.5
RCO
19.1 22.1 36.5 14.3 17.8 34.0
V V C1 C0 SUPPLY CURRENT PER AMPLIFIER (mA) H H
10 10 10 10 10 10
H L
7 7 7 7 7 7 SHDNREF
L H
5 5 5 5 5 5
L L
2 2 2 2 2 2
One Control Input
12V OR VLOGIC
RESISTOR VALUES (k
Ω
) R
R
SHDN TO VCC (12V) RSHDN TO VLOGIC
V SHDN LOGIC RC
VLOGIC 3V 3.3V 5V 3V 3.3V 5V
0V VC SHDN
RSHDN
40.2 43.2 60.4 4.99 6.81 19.6
R
2k
C
7.32 8.25 13.7 5.49 6.65 12.7
VC SUPPLY CURRENT PER AMPLIFIER (mA) H
10 10 10 10 10 10
L
2 2 2 2 2 2 6300 F04 SHDNREF
Figure 4. Providing Logic Input Control of Operating Current Logic Controlled Operating Current
while maintaining less than 2Ω output impedance to frequencies less than 1MHz. This low power mode retains The DSP controller in a typical xDSL application can have termination impedance at the amplifier outputs and the I/O pins assigned to provide logic control of the LT6300 line driving back termination resistors. With this termina- line driver operating current. As shown in Figure 4 one or tion, while a DSL port is not transmitting data, it can still two logic control inputs can control two or four different sense a received signal from the line across the back- operating modes. The logic inputs add or subtract current termination resistors and respond accordingly. to the SHDN input to set the operating current. The one logic input example selects the supply current to be either The two logic input control provides two intermediate full power, 10mA per amplifier or just 2mA per amplifier, (approximately 7mA per amplifier and 5mA per amplifier) which significantly reduces the driver power consumption operating levels between full power and termination 8
U U W U APPLICATIO S I FOR ATIO
45 VS = ±12V V+ = 12V 40 SHDN 35 V+ – 1.2V I ≈ S PER AMPLIFIER (mA) • 64 R 30 BIAS + 5k 25 R V+ – 1.2V BIAS = • 64 – 5k 20 IS PER AMPLIFIER (mA) PER AMPLIFIER (mA) SHDNREF 15 RBIAS I SUPPLY 10 5 0 4 7 10 30 50 70 90 100 130 150 170 190 210 230 250 270 290 RBIAS (kΩ) 6300 F03
Figure 3. RBIAS to Ground Current Control Two Control Inputs
12V OR VLOGIC
RESISTOR VALUES (k
Ω
)
R
R
V SHDN
SHDN TO VCC (12V) RSHDN TO VLOGIC
LOGIC RC1
VLOGIC 3V 3.3V 5V 3V 3.3V 5V
VC1 SHDN
RSHDN
40.2 43.2 60.4 4.99 6.81 19.6 R 0V C0 V 2k
R
C0
C1
11.5 13.0 21.5 8.66 10.7 20.5
RCO
19.1 22.1 36.5 14.3 17.8 34.0
V V C1 C0 SUPPLY CURRENT PER AMPLIFIER (mA) H H
10 10 10 10 10 10
H L
7 7 7 7 7 7 SHDNREF
L H
5 5 5 5 5 5
L L
2 2 2 2 2 2
One Control Input
12V OR VLOGIC
RESISTOR VALUES (k
Ω
) R
R
SHDN TO VCC (12V) RSHDN TO VLOGIC
V SHDN LOGIC RC
VLOGIC 3V 3.3V 5V 3V 3.3V 5V
0V VC SHDN
RSHDN
40.2 43.2 60.4 4.99 6.81 19.6
R
2k
C
7.32 8.25 13.7 5.49 6.65 12.7
VC SUPPLY CURRENT PER AMPLIFIER (mA) H
10 10 10 10 10 10
L
2 2 2 2 2 2 6300 F04 SHDNREF
Figure 4. Providing Logic Input Control of Operating Current Logic Controlled Operating Current
while maintaining less than 2Ω output impedance to frequencies less than 1MHz. This low power mode retains The DSP controller in a typical xDSL application can have termination impedance at the amplifier outputs and the I/O pins assigned to provide logic control of the LT6300 line driving back termination resistors. With this termina- line driver operating current. As shown in Figure 4 one or tion, while a DSL port is not transmitting data, it can still two logic control inputs can control two or four different sense a received signal from the line across the back- operating modes. The logic inputs add or subtract current termination resistors and respond accordingly. to the SHDN input to set the operating current. The one logic input example selects the supply current to be either The two logic input control provides two intermediate full power, 10mA per amplifier or just 2mA per amplifier, (approximately 7mA per amplifier and 5mA per amplifier) which significantly reduces the driver power consumption operating levels between full power and termination 8